CS501-Midterm
1 / 50
Computer system performance is usually measured by the ---------------
2 / 50
Which of the instruction is used to load register from memory using a relative address?
3 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
4 / 50
Which one of the following registers holds the address of the next instruction to be executed?
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In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
6 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
7 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
8 / 50
________ operation is required to change the processor‟s state to a known, defined value.
9 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
10 / 50
_____________ controller controls the sequence of the flow of microinstructions.
11 / 50
Which one of the following portions of an instruction represents the operation to be performed?
12 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
13 / 50
What functionality is performed by the instruction “str R8, 34” of SRC?
14 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
15 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
16 / 50
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
17 / 50
Almost every commercial computer has its own particular ---------- language
18 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
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_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
20 / 50
21 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
22 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
23 / 50
The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
24 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
25 / 50
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
26 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
27 / 50
Which one of the following register holds the instruction that is being executed?
28 / 50
An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
29 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
30 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
31 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
32 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
33 / 50
The code size of 2-address instruction is ________________.
34 / 50
Which one of the following is the memory organization of EAGLE processor?
35 / 50
Which one of the following registers holds the instruction that is being executed?
36 / 50
Which one of the following is the memory organization of FALCON-E processor?
37 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
38 / 50
Which field of the machine language instruction is the “type of operation” that is to be performed?
39 / 50
The external interface of FALCON-A consists of a ______address bus and ______a data bus.
40 / 50
The external interface of FALCON-A consists of a ________ data bus.
41 / 50
Motorola MC68000 is an example of ---------microprocessor.
42 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
43 / 50
What is the size of the memory space that is available to FALCON-A processor?
44 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
45 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
46 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
47 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
48 / 50
What is the instruction length of the SRC processor?
49 / 50
Type A of SRC has which of the following instructions?
50 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
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