CS501-Midterm
1 / 50
Which one of the following is the memory organization of FALCON-E processor?
2 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
3 / 50
Type A of SRC has which of the following instructions?
4 / 50
Computer system performance is usually measured by the ---------------
5 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
6 / 50
What is the instruction length of the SRC processor?
7 / 50
________ operation is required to change the processor‟s state to a known, defined value.
8 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
9 / 50
What is the working of Processor Status Word (PSW)?
10 / 50
An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
11 / 50
Motorola MC68000 is an example of ---------microprocessor.
12 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
13 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
14 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
15 / 50
What does the instruction “ldr R3, 58” of SRC do?
16 / 50
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
17 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
18 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
19 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
20 / 50
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
21 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
22 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
23 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
24 / 50
Which one of the following is the memory organization of EAGLE processor?
25 / 50
The external interface of FALCON-A consists of a ______address bus and ______a data bus.
26 / 50
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
27 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
28 / 50
Which one of the following registers holds the instruction that is being executed?
29 / 50
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
30 / 50
Which instruction is used to store register to memory using relative address?
31 / 50
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
32 / 50
Which one of the following registers holds the address of the next instruction to be executed?
33 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
34 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
35 / 50
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
36 / 50
Which one of the following register holds the instruction that is being executed?
37 / 50
-------------- performs the data operations as commanded by the program instructions.
38 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
39 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
40 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
41 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
42 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
43 / 50
There are _________ types of reset operations in SRC
44 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write
45 / 50
Almost every commercial computer has its own particular ---------- language
46 / 50
The external interface of FALCON-A consists of a ________ data bus.
47 / 50
Which one of the following portions of an instruction represents the operation to be performed?
48 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
49 / 50
_____________ controller controls the sequence of the flow of microinstructions.
50 / 50
which type of instructions help in changing the flow of the program as and when required?
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