CS501-Midterm
1 / 50
The code size of 2-address instruction is ________________.
2 / 50
Almost every commercial computer has its own particular ---------- language
3 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
4 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
5 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
6 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
7 / 50
Which one of the following is the memory organization of FALCON-E processor?
8 / 50
________ operation is required to change the processor‟s state to a known, defined value.
9 / 50
-------------- performs the data operations as commanded by the program instructions.
10 / 50
Which one of the following registers holds the instruction that is being executed?
11 / 50
What is the working of Processor Status Word (PSW)?
12 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
13 / 50
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
14 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
15 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
16 / 50
Which of the instruction is used to load register from memory using a relative address?
17 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
18 / 50
_____________ controller controls the sequence of the flow of microinstructions.
19 / 50
What is the instruction length of the SRC processor?
20 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
21 / 50
The external interface of FALCON-A consists of a ________ data bus.
22 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
23 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
24 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
25 / 50
What is the size of the memory space that is available to FALCON-A processor?
26 / 50
Which instruction is used to store register to memory using relative address?
27 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
28 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
29 / 50
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
30 / 50
Type A of SRC has which of the following instructions?
31 / 50
Which one of the following is the memory organization of EAGLE processor?
32 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
33 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
34 / 50
35 / 50
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
36 / 50
Execution time of a program with respect to the processor is calculated as:
37 / 50
Computer system performance is usually measured by the ---------------
38 / 50
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
39 / 50
What is the instruction length of the FALCON-A processor?
40 / 50
Which one of the following registers holds the address of the next instruction to be executed?
41 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
42 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
43 / 50
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
44 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
45 / 50
46 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
47 / 50
which type of instructions help in changing the flow of the program as and when required?
48 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
49 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
50 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
Your score is
The average score is 36%
Restart quiz
