CS501-Midterm
1 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
2 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
3 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
4 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
5 / 50
The external interface of FALCON-A consists of a ________ data bus.
6 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
7 / 50
Almost every commercial computer has its own particular ---------- language
8 / 50
Which one of the following is the memory organization of EAGLE processor?
9 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
10 / 50
What is the working of Processor Status Word (PSW)?
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Computer system performance is usually measured by the ---------------
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Type A of SRC has which of the following instructions?
13 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
14 / 50
_____________ controller controls the sequence of the flow of microinstructions.
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To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
16 / 50
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
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Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
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Which one of the following registers holds the address of the next instruction to be executed?
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Which one of the following registers holds the instruction that is being executed?
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In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
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In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
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Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
23 / 50
The code size of 2-address instruction is ________________.
24 / 50
Which instruction is used to store register to memory using relative address?
25 / 50
The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
26 / 50
Execution time of a program with respect to the processor is calculated as:
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The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
28 / 50
There are _________ types of reset operations in SRC
29 / 50
What is the instruction length of the FALCON-A processor?
30 / 50
________ operation is required to change the processor‟s state to a known, defined value.
31 / 50
Which one of the following register holds the instruction that is being executed?
32 / 50
which type of instructions help in changing the flow of the program as and when required?
33 / 50
Which of the instruction is used to load register from memory using a relative address?
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-------------- performs the data operations as commanded by the program instructions.
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An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
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Which field of the machine language instruction is the “type of operation” that is to be performed?
37 / 50
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
38 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
39 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
40 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
41 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
42 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
43 / 50
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
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45 / 50
What is the size of the memory space that is available to FALCON-A processor?
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The external interface of FALCON-A consists of a ______address bus and ______a data bus.
47 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
48 / 50
Which one of the following portions of an instruction represents the operation to be performed?
49 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
50 / 50
Which one of the following is the memory organization of FALCON-E processor?
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