CS302-Midterm
1 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
2 / 50
If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
3 / 50
Half-Adder Logic circuit contains 2 XOR Gates
4 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
5 / 50
The GAL22V10 has ____ inputs
6 / 50
The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10
7 / 50
The values that exceed the specified range can not be correctly represented and are considered as ________
8 / 50
The 4-bit 2‟s complement representation of “-7” is _____________
9 / 50
The binary value of 1010 is converted to the product term
10 / 50
The AND Gate performs a logical __________function
11 / 50
The Unsigned Binary representation can only represent positive binary numbers
12 / 50
A particular Full Adder has
13 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
14 / 50
TTL based devices work with a dc supply of ____ Volts
15 / 50
Sequential circuits have storage elements
16 / 50
Circuits having a bubble at their outputs are considered to have an active-low output.
17 / 50
The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
18 / 50
A BCD to 7-Segment decoder has
19 / 50
20 / 50
The range of Excess-8 code is from ______ to ______
21 / 50
NOR Gate can be used to perform the operation of AND, OR and NOT Gate
22 / 50
23 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
24 / 50
The expression _________ is an example of Commutative Law for Multiplication.
25 / 50
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
26 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
27 / 50
The device shown here is most likely a
28 / 50
The ecimal “8” is represented as using Gray-Code.
29 / 50
(A+B).(A+C) =
30 / 50
Demultiplexer has
31 / 50
The diagram given below represents __________
32 / 50
Generally, the Power dissipation of _______ devices remains constant throughout their operation.
33 / 50
Following is standard POS expression
34 / 50
The Quad Multiplexer has _____ outputs
35 / 50
The ABEL symbol for “XOR” operation is
36 / 50
37 / 50
The output A < B is set to 1 when the input combinations is
38 / 50
39 / 50
The output of an AND gate is one when _______
40 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
41 / 50
High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
42 / 50
Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.
43 / 50
A latch has _____ stable states
44 / 50
The function to be performed by the processor is selected by set of inputs known as ________
45 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
46 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
47 / 50
The binary value “1010110” is equivalent to decimal __________
48 / 50
2's complement of any binary number can be calculated by
49 / 50
50 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
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