CS302 Midterm Online Quiz

CS302-Midterm

1 / 50

The expression _________ is an example of Commutative Law for Multiplication.

AB+C = A+BC

AB=BA

A+B=B+A

A(B+C) = B(A+C)

2 / 50

"Sum-of-Weights" method is used __________

to decode data

to convert from serial to parralel data

to encode data

to convert from one number system to other

3 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

24.582

0.24582

24582

2.4582

4 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

RESET

Clear

SET

Invalid

5 / 50

How many data select lines are required for selecting eight inputs?

6 / 50

The binary value “1010110” is equivalent to decimal __________

7 / 50

A latch retains the state unless

Clock pulse is changed

Power is turned off

Output is changed

Input is changed

8 / 50

The device shown here is most likely a

Demultiplexer

Parity generator

Comparator

Multiplexer

9 / 50

The diagram given below represents __________

Associative law

Demorgans law

Product of sum form

Sum of product form

10 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

10 (binary)

Undefined

Zero

One

11 / 50

A particular Full Adder has

2 inputs and 2 output

2 inputs and 3 output

3 inputs and 2 output

3 inputs and 3 output

12 / 50

The main use of the Multiplexer is to

Select data from Single source and to route it to a multiple Destinations

Select data from multiple sources and to route to multiple destinations

Select data from Single source and to route to single destination

Select data from multiple sources and to route it to a single Destination

13 / 50

Tri-State Buffer is basically a/an _________ gate.

NOT

AND

XOR

14 / 50

A particular Full Adder has

3 inputs and 2 output

2 inputs and 3 output

2 inputs and 2 output

3 inputs and 3 output

15 / 50

Caveman number system is Base _5 number system

16 / 50

All the ABEL equations must end with ________

“ endl “ (keyword “endl”)

“ . “ (a dot)

“ ; “ (a semicolon)

“ $ “ (a dollar symbol)

17 / 50

Which one is true:

Power consumption of TTL is higher than of CMOS

Power consumption of CMOS is higher than of TTL

Both TTL and CMOS have same power consumption

Power consumption of both CMOS and TTL depends on no. of gates in the circuit

18 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

0.9 V

0.5 V

3.3 V

0.3 V

19 / 50

The range of Excess-8 code is from ______ to ______

+8 to -7

+7 to -8

+9 to -8

-9 to +8

20 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

1001

110

1111

111

21 / 50

Demultiplexer has

Multiple inputs and multiple outputs.

Single input and multiple outputs.

Multiple inputs and single output.

Single input and single outputs.

22 / 50

A.(B+ C) = A.B + A.C is the expression of

Associative Law

Commutative Law

Demorgan‟s Law

Distributive Law

23 / 50

Tri-State Buffer is basically a/an _________ gate.

NOT

XOR

AND

24 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

25 / 50

GAL is an acronym for ________.

Generic Analysis Logic

Generic Array Logic

General Array Logic

Giant Array Logic

26 / 50

A.(B.C) = (A.B).C is an expression of __________

Distributive Law

Associative Law

Demorgan‟s Law

Commutative Law

27 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A > B = 1, A < B = 0, A = B = 0

A>B=0,A<B=1,A=B=0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=1

28 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

16-bits

32-bits

8-bits

64-bits

29 / 50

The Quad Multiplexer has _____ outputs

30 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

RESET

Clear

Invalid

SET

31 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

Clear

RESET

SET

Invalid

32 / 50

The Quad Multiplexer has _____ outputs

33 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A > B = 1, A < B = 0, A = B = 0

A>B=0,A<B=1,A=B=0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=1

34 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

35 / 50

In the binary number “10011” the weight of the most significant digit is ____

24 (2 raise to power 4)

21 (2 raise to power 1)

20 (2 raise to power 0)

23 (2 raise to power 3)

36 / 50

The ecimal “8” is represented as using Gray-Code.

1000

1100

1010

37 / 50

(A+B).(A+C) =

B+C

AC+B

AB+C

A+BC

38 / 50

The binary value “11011” is equivalent to __________

E2.

39 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

Undefined

Zero

One

40 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

Power dissipation of all circuits increases with time.

CMOS 3.5 series

TTL

CMOS 5 Series

41 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

8-bit

16-bit

7-bit

2-bit

42 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

43 / 50

Sequential circuits have storage elements

FALSE

TRUE

44 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

2-input, 8-bit

4-input, 16-bit

2-input, 4-bit

4-input, 8-bit

45 / 50

The function to be performed by the processor is selected by set of inputs known as ____

Function Select Inputs

MicroOperation selectors

OPCODE Selectors

None of given option

46 / 50

An important application of AND Gate is its use in counter circuit

TRUE

FALSE

47 / 50

The Quad Multiplexer has _____ outputs

48 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

Parity

Carry

Overflow

Sign value

49 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

Power dissipation of all circuits increases with time.

CMOS 3.5 series

CMOS 5 Series

TTL

50 / 50

The binary value of 1010 is converted to the product term

TRUE

FALSE

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The average score is 44%