CS302-Midterm
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The Quad Multiplexer has _____ outputs
2 / 50
The diagram given below represents __________
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A logic circuit with an output consists of ________.
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The maximum number that can be represented using unsigned octal system is _______
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6 / 50
The AND Gate performs a logical __________function
7 / 50
The ecimal “8” is represented as using Gray-Code.
8 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
9 / 50
The Unsigned Binary representation can only represent positive binary numbers
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A.(B+ C) = A.B + A.C is the expression of
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Half-Adder Logic circuit contains 2 XOR Gates
12 / 50
The binary value “1010110” is equivalent to decimal __________
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Which one is true:
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3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
15 / 50
Generally, the Power dissipation of _______ devices remains constant throughout their operation.
16 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
17 / 50
The _______ Encoder is used as a keypad encoder.
18 / 50
The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
20 / 50
A particular Full Adder has
21 / 50
A SOP expression is equal to 1 ______________
22 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
23 / 50
Demultiplexer has
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If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
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High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
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The GAL22V10 has ____ inputs
28 / 50
In the binary number “10011” the weight of the most significant digit is ____
29 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
30 / 50
A standard POS form has __________ terms that have all the variables in the domain of the expression.
31 / 50
Tri-State Buffer is basically a/an _________ gate.
32 / 50
The ABEL notation equivalent to Boolean expression A+B is:
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34 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
35 / 50
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
36 / 50
A latch retains the state unless
37 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
38 / 50
Sequential circuits have storage elements
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40 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
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A.(B.C) = (A.B).C is an expression of __________
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A latch has _____ stable states
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(A+B).(A+C) =
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"Sum-of-Weights" method is used __________
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A BCD to 7-Segment decoder has
48 / 50
TTL based devices work with a dc supply of ____ Volts
49 / 50
The range of Excess-8 code is from ______ to ______
50 / 50
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