CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

2 / 50

The Unsigned Binary representation can only represent positive binary numbers

3 / 50

 Demultiplexer has

4 / 50

The binary value “1010110” is equivalent to decimal __________

5 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

6 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

7 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

8 / 50

 How many data select lines are required for selecting eight inputs?

9 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

10 / 50

The OR Gate performs a Boolean _______ function

11 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

12 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

13 / 50

The Quad Multiplexer has _____ outputs

14 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

15 / 50

Tri-State Buffer is basically a/an _________ gate.

16 / 50

 The binary value “11011” is equivalent to __________

17 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

18 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

19 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

20 / 50

NOR gate is formed by connecting _________

21 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

22 / 50

An S-R latch can be implemented by using _________ gates

23 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

24 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

25 / 50

 Tri-State Buffer is basically a/an _________ gate.

26 / 50

The ABEL notation equivalent to Boolean expression A+B is:

27 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

28 / 50

 Demultiplexer has

29 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

30 / 50

The output A < B is set to 1 when the input combinations is

31 / 50

2's complement of any binary number can be calculated by

32 / 50

The binary value of 1010 is converted to the product term

33 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

34 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

35 / 50

TTL based devices work with a dc supply of ____ Volts

36 / 50

A BCD to 7-Segment decoder has

37 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

38 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

39 / 50

Which one is true:

40 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

41 / 50

The output A < B is set to 1 when the input combinations is __________

42 / 50

Demultiplexer has

43 / 50

GAL is an acronym for ________.

44 / 50

A logic circuit with an output  consists of ________.

45 / 50

The binary value “1010110” is equivalent to decimal __________

46 / 50

The diagram given below represents __________

47 / 50

The 4-bit 2’s complement representation of “+5” is _____________

48 / 50

A Demultiplexer is not available commercially.

49 / 50

The main use of the Multiplexer is to

50 / 50

Caveman number system is Base _5 number system

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