CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

2 / 50

All the ABEL equations must end with ________

3 / 50

The device shown here is most likely a

4 / 50

The ecimal “8” is represented as using Gray-Code.

5 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

6 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

7 / 50

 A particular Full Adder has  

8 / 50

The AND Gate performs a logical __________function

9 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

10 / 50

 Tri-State Buffer is basically a/an _________ gate.

11 / 50

The ecimal “8” is represented as using Gray-Code.

12 / 50

TTL based devices work with a dc supply of ____ Volts

13 / 50

  "Sum-of-Weights" method is used __________

14 / 50

The 4-bit 2’s complement representation of “+5” is _____________

15 / 50

 Demultiplexer has

16 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

17 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

18 / 50

The ABEL notation equivalent to Boolean expression A+B is:

19 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

20 / 50

A BCD to 7-Segment decoder has

21 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

22 / 50

The binary value “1010110” is equivalent to decimal __________

23 / 50

Which one is true:

24 / 50

  The Quad Multiplexer has _____ outputs

25 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

26 / 50

A Demultiplexer is not available commercially.

27 / 50

A.(B.C) = (A.B).C is an expression of __________

28 / 50

The Quad Multiplexer has _____ outputs

29 / 50

 How many data select lines are required for selecting eight inputs?

30 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

31 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

32 / 50

The Quad Multiplexer has _____ outputs

33 / 50

"Sum-of-Weights" method is used __________ 

34 / 50

NOR gate is formed by connecting _________

35 / 50

Tri-State Buffer is basically a/an _________ gate.

36 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

37 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

38 / 50

(A+B).(A+C) =  

39 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

40 / 50

A particular Full Adder has 

41 / 50

The range of Excess-8 code is from ______ to ______

42 / 50

The binary value of 1010 is converted to the product term

43 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

44 / 50

The GAL22V10 has ____ inputs

45 / 50

Caveman number system is Base _5 number system

46 / 50

The Unsigned Binary representation can only represent positive binary numbers

47 / 50

The range of Excess-8 code is from ______ to ______

48 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

49 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

50 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

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