CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

2 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

3 / 50

Following is standard POS expression

4 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

5 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

6 / 50

The device shown here is most likely a

7 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

8 / 50

 The binary value “1010110” is equivalent to decimal __________

9 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

10 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

11 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

12 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

13 / 50

A latch retains the state unless

14 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

15 / 50

 The binary value “11011” is equivalent to __________

16 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

17 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

18 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

19 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

20 / 50

Which one is true:

21 / 50

A BCD to 7-Segment decoder has

22 / 50

A latch has _____ stable states

23 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

24 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

25 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

26 / 50

The function to be performed by the processor is selected by set of inputs known as ____

27 / 50

The binary value of 1010 is converted to the product term

28 / 50

In the binary number “10011” the weight of the most significant digit is ____

29 / 50

Caveman number system is Base _5 number system

30 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

31 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

32 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

33 / 50

A Demultiplexer is not available commercially.

34 / 50

 Demultiplexer has

35 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

36 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

37 / 50

NOR gate is formed by connecting _________

38 / 50

The binary value “1010110” is equivalent to decimal __________

39 / 50

  "Sum-of-Weights" method is used __________

40 / 50

All the ABEL equations must end with ________

41 / 50

The output A < B is set to 1 when the input combinations is __________

42 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

43 / 50

An important application of AND Gate is its use in counter circuit

44 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

45 / 50

GAL is an acronym for ________.

46 / 50

A BCD to 7-Segment decoder has

47 / 50

The range of Excess-8 code is from ______ to ______

48 / 50

A.(B.C) = (A.B).C is an expression of __________

49 / 50

Sequential circuits have storage elements

50 / 50

The AND Gate performs a logical __________function

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