CS302-Midterm
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A BCD to 7-Segment decoder has
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The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
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The range of Excess-8 code is from ______ to ______
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The ABEL notation equivalent to Boolean expression A+B is:
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If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
7 / 50
The 4-bit 2’s complement representation of “+5” is _____________
8 / 50
The diagram given below represents __________
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10 / 50
The binary value “11011” is equivalent to __________
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The maximum number that can be represented using unsigned octal system is _______
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The output A < B is set to 1 when the input combinations is __________
15 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
16 / 50
The binary value “1010110” is equivalent to decimal __________
17 / 50
The ecimal “8” is represented as using Gray-Code.
18 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
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The 4-bit 2‟s complement representation of “-7” is _____________
20 / 50
A particular Full Adder has
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If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
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(A+B).(A+C) =
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In ABEL the variable „A‟ is treated separately from variable „a‟
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"Sum-of-Weights" method is used __________
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A SOP expression is equal to 1 ______________
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Generally, the Power dissipation of devices remains constant throughout their operation.
27 / 50
The GAL22V10 has ____ inputs
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A.(B+ C) = A.B + A.C is the expression of
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The values that exceed the specified range can not be correctly represented and are considered as ________
30 / 50
3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
31 / 50
An S-R latch can be implemented by using _________ gates
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The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
33 / 50
The OR Gate performs a Boolean _______ function
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Half-Adder Logic circuit contains 2 XOR Gates
35 / 50
Sequential circuits have storage elements
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The output of an AND gate is one when _______
37 / 50
A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.
38 / 50
TTL based devices work with a dc supply of ____ Volts
39 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
40 / 50
The Unsigned Binary representation can only represent positive binary numbers
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A latch has _____ stable states
42 / 50
A Demultiplexer is not available commercially.
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The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
44 / 50
An important application of AND Gate is its use in counter circuit
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46 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
47 / 50
The ABEL symbol for “OR” operation is
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49 / 50
The AND Gate performs a logical __________function
50 / 50
Two 2-bit comparator circuits can be connected to form single 4-bit comparator
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