CS302-Midterm
1 / 50
The function to be performed by the processor is selected by set of inputs known as ________
2 / 50
Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.
3 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
4 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
5 / 50
Following is standard POS expression
6 / 50
The diagram given below represents __________
7 / 50
Caveman number system is Base _5 number system
8 / 50
The 4-bit 2‟s complement representation of “-7” is _____________
9 / 50
Demultiplexer has
10 / 50
The binary value “1010110” is equivalent to decimal __________
11 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
12 / 50
The Quad Multiplexer has _____ outputs
13 / 50
14 / 50
The main use of the Multiplexer is to
15 / 50
A standard POS form has __________ terms that have all the variables in the domain of the expression.
16 / 50
In the binary number “10011” the weight of the most significant digit is ____
17 / 50
GAL is an acronym for ________.
18 / 50
A Demultiplexer is not available commercially.
19 / 50
Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.
20 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
21 / 50
Circuits having a bubble at their outputs are considered to have an active-low output.
22 / 50
The ABEL notation equivalent to Boolean expression A+B is:
23 / 50
The maximum number that can be represented using unsigned octal system is _______
24 / 50
The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code
25 / 50
If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
26 / 50
High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
27 / 50
The OR Gate performs a Boolean _______ function
28 / 50
The output of an AND gate is one when _______
29 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
30 / 50
The AND Gate performs a logical __________function
31 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
32 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
33 / 50
34 / 50
The range of Excess-8 code is from ______ to ______
35 / 50
36 / 50
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
37 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
38 / 50
The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms
39 / 50
40 / 50
The ecimal “8” is represented as using Gray-Code.
41 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
42 / 50
A.(B+ C) = A.B + A.C is the expression of
43 / 50
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
44 / 50
45 / 50
A SOP expression is equal to 1 ______________
46 / 50
Generally, the Power dissipation of _______ devices remains constant throughout their operation.
47 / 50
48 / 50
A latch retains the state unless
49 / 50
A BCD to 7-Segment decoder has
50 / 50
NOR Gate can be used to perform the operation of AND, OR and NOT Gate
Your score is
The average score is 44%
Restart quiz
