CS302-Midterm
1 / 50
A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.
2 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
3 / 50
The binary value “1010110” is equivalent to decimal __________
4 / 50
The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10
5 / 50
The Quad Multiplexer has _____ outputs
6 / 50
Following is standard POS expression
7 / 50
8 / 50
The 4-bit 2’s complement representation of “+5” is _____________
9 / 50
The GAL22V10 has ____ inputs
10 / 50
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
11 / 50
TTL based devices work with a dc supply of ____ Volts
12 / 50
The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
13 / 50
A particular Full Adder has
14 / 50
15 / 50
The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms
16 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
17 / 50
A BCD to 7-Segment decoder has
18 / 50
The binary value “11011” is equivalent to __________
19 / 50
The main use of the Multiplexer is to
20 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
21 / 50
Two 2-bit comparator circuits can be connected to form single 4-bit comparator
22 / 50
Generally, the Power dissipation of devices remains constant throughout their operation.
23 / 50
Demultiplexer has
24 / 50
The expression _________ is an example of Commutative Law for Multiplication.
25 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
26 / 50
A logic circuit with an output consists of ________.
27 / 50
The AND Gate performs a logical __________function
28 / 50
29 / 50
An S-R latch can be implemented by using _________ gates
30 / 50
An important application of AND Gate is its use in counter circuit
31 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
32 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
33 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
34 / 50
A Demultiplexer is not available commercially.
35 / 50
36 / 50
A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.
37 / 50
Caveman number system is Base _5 number system
38 / 50
The ecimal “8” is represented as using Gray-Code.
39 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
40 / 50
The 4-bit 2‟s complement representation of “-7” is _____________
41 / 50
All the ABEL equations must end with ________
42 / 50
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
43 / 50
How many data select lines are required for selecting eight inputs?
44 / 50
If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
45 / 50
The function to be performed by the processor is selected by set of inputs known as ____
46 / 50
The diagram given below represents __________
47 / 50
The ABEL notation equivalent to Boolean expression A+B is:
48 / 50
49 / 50
Which one is true:
50 / 50
GAL is an acronym for ________.
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