CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

A BCD to 7-Segment decoder has

2 / 50

In the binary number “10011” the weight of the most significant digit is ____

3 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

4 / 50

A particular Full Adder has

5 / 50

Demultiplexer has

6 / 50

An important application of AND Gate is its use in counter circuit

7 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

8 / 50

The 4-bit 2’s complement representation of “+5” is _____________

9 / 50

 The binary value “1010110” is equivalent to decimal __________

10 / 50

Caveman number system is Base _5 number system

11 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

12 / 50

A Demultiplexer is not available commercially.

13 / 50

 Demultiplexer has

14 / 50

The ecimal “8” is represented as using Gray-Code.

15 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

16 / 50

The diagram given below represents __________

17 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

18 / 50

The output A < B is set to 1 when the input combinations is

19 / 50

An S-R latch can be implemented by using _________ gates

20 / 50

Tri-State Buffer is basically a/an _________ gate.

21 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

22 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

23 / 50

 Tri-State Buffer is basically a/an _________ gate.

24 / 50

NOR gate is formed by connecting _________

25 / 50

  The Quad Multiplexer has _____ outputs

26 / 50

  "Sum-of-Weights" method is used __________

27 / 50

A.(B.C) = (A.B).C is an expression of __________

28 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

29 / 50

A particular Full Adder has 

30 / 50

The range of Excess-8 code is from ______ to ______

31 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

32 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

33 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

34 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

35 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

36 / 50

(A+B).(A+C) =  

37 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

38 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

39 / 50

2's complement of any binary number can be calculated by

40 / 50

Sequential circuits have storage elements

41 / 50

The Quad Multiplexer has _____ outputs

42 / 50

 Demultiplexer has

43 / 50

Half-Adder Logic circuit contains 2 XOR Gates

44 / 50

Following is standard POS expression

45 / 50

A latch has _____ stable states

46 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

47 / 50

The ABEL symbol for “XOR” operation is

48 / 50

Which one is true:

49 / 50

The range of Excess-8 code is from ______ to ______

50 / 50

 How many data select lines are required for selecting eight inputs?

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