CS302 Midterm Online Quiz

CS302-Midterm

1 / 50

NOR gate is formed by connecting _________

NOT Gate and then OR Gate

OR Gate and then AND Gate

OR Gate and then NOT Gate

AND Gate and then OR Gate

2 / 50

An S-R latch can be implemented by using _________ gates

NAND, NOR

NOT, XOR

NAND, XOR

AND, OR

3 / 50

Demultiplexer has

Multiple inputs and single output.

Multiple inputs and multiple outputs.

Single input and multiple outputs.

Single input and single outputs.

4 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

16-bit

8-bit

2-bit

7-bit

5 / 50

The Quad Multiplexer has _____ outputs

6 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

0 to 4.5

4 to 4.5

0 to 3.5

4.5 to 5

7 / 50

The ABEL notation equivalent to Boolean expression A+B is:

A $ BL-21

A ! B

A # B

A & B

8 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

9 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

CMOS+

None of the given options

E2CMOS

TTL

10 / 50

A particular Full Adder has

3 inputs and 2 output

3 inputs and 3 output

2 inputs and 2 output

2 inputs and 3 output

11 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

12 / 50

The GAL22V10 has ____ inputs

13 / 50

The binary value “1010110” is equivalent to decimal __________

14 / 50

Demultiplexer has

Single input and multiple outputs.

Multiple inputs and multiple outputs.

Single input and single outputs.

Multiple inputs and single output.

15 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

16-bits

8-bits

32-bits

64-bits

16 / 50

The main use of the Multiplexer is to

Select data from multiple sources and to route to multiple destinations

Select data from multiple sources and to route it to a single Destination

Select data from Single source and to route it to a multiple Destinations

Select data from Single source and to route to single destination

17 / 50

The 4-bit 2’s complement representation of “+5” is _____________

10120

1110

1010

1011

18 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

Undefined

10 (binary)

Zero

One

19 / 50

(A+B).(A+C) =

AB+C

AC+B

A+BC

B+C

20 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

Sign value

Overflow

Parity

Carry

21 / 50

A BCD to 7-Segment decoder has

7 inputs and 3 outputs

4 inputs and 7 outputs

3 inputs and 7 outputs

7 inputs and 4 outputs

22 / 50

A logic circuit with an output consists of ________.

two AND gates, one OR gate

two AND gates, one OR gate, two inverters

two AND gates, two OR gates, two inverters

three AND gates, two OR gates, one inverter

23 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

TRUE

FALSE

24 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

25 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

FALSE

TRUE

26 / 50

Which one is true:

Both TTL and CMOS have same power consumption

Power consumption of CMOS is higher than of TTL

Power consumption of both CMOS and TTL depends on no. of gates in the circuit

Power consumption of TTL is higher than of CMOS

27 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

0.3 V

0.5 V

0.9 V

3.3 V

28 / 50

The diagram given below represents __________

Product of sum form

Demorgans law

Sum of product form

Associative law

29 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

Different

Similar with some enhancements

Similar

Depends on the type of PALs input size

30 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

31 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

>B=1,A<B=0,A=B=0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=0

>B=0,A<B=1,A=B=1

32 / 50

The device shown here is most likely a

Multiplexer

Demultiplexer

Comparator

Parity generator

33 / 50

The Quad Multiplexer has _____ outputs

34 / 50

The binary value “1010110” is equivalent to decimal __________

35 / 50

A latch retains the state unless

Output is changed

Clock pulse is changed

Power is turned off

Input is changed

36 / 50

2's complement of any binary number can be calculated by

adding 1's complement twice

subtracting 1 from 1's complement.

calculating 1's complement and inverting Most significant bit

adding 1 to 1's complement

37 / 50

Sequential circuits have storage elements

FALSE

TRUE

38 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

8-bit

16-bit

2-bit

7-bit

39 / 50

The binary value of 1010 is converted to the product term

FALSE

TRUE

40 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

Min

Composite

Sum

Product

41 / 50

The diagram given below represents __________

Sum of product form

Associative law

Demorgans law

Product of sum form

42 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

Clear

RESET

Invalid

SET

43 / 50

The output of an AND gate is one when _______

All of the inputs are one

All the inputs are zero

Any of the input is one

Any of the input is zero

44 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

32-bits

16-bits

8-bits

64-bits

45 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

46 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

47 / 50

"Sum-of-Weights" method is used __________

to encode data

to decode data

to convert from one number system to other

to convert from serial to parralel data

48 / 50

The binary value of 1010 is converted to the product term

FALSE

TRUE

49 / 50

The GAL22V10 has ____ inputs

50 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

TRUE

FALSE

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