CS302-Midterm
1 / 50
Tri-State Buffer is basically a/an _________ gate.
2 / 50
Circuits having a bubble at their outputs are considered to have an active-low output.
3 / 50
All the ABEL equations must end with ________
4 / 50
The Quad Multiplexer has _____ outputs
5 / 50
An important application of AND Gate is its use in counter circuit
6 / 50
The binary value of 1010 is converted to the product term
7 / 50
A latch retains the state unless
8 / 50
The diagram given below represents __________
9 / 50
The 4-bit 2‟s complement representation of “-7” is _____________
10 / 50
A particular Full Adder has
11 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
12 / 50
The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code
13 / 50
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
14 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
15 / 50
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
16 / 50
GALcan be reprogrammed because instead of fuses __________logic is used in it
17 / 50
Generally, the Power dissipation of devices remains constant throughout their operation.
18 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
19 / 50
In the Karnaugh map shown above, which of the loops shown represents a legal grouping?
20 / 50
A logic circuit with an output consists of ________.
21 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
22 / 50
Sequential circuits have storage elements
23 / 50
24 / 50
The ABEL symbol for “XOR” operation is
25 / 50
The output A < B is set to 1 when the input combinations is __________
26 / 50
A latch has _____ stable states
27 / 50
Which one is true:
28 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
29 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
30 / 50
Half-Adder Logic circuit contains 2 XOR Gates
31 / 50
How many data select lines are required for selecting eight inputs?
32 / 50
3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
33 / 50
The binary value “1010110” is equivalent to decimal __________
34 / 50
"Sum-of-Weights" method is used __________
35 / 50
Two 2-bit comparator circuits can be connected to form single 4-bit comparator
36 / 50
A BCD to 7-Segment decoder has
37 / 50
The Unsigned Binary representation can only represent positive binary numbers
38 / 50
39 / 50
Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.
40 / 50
The binary value “11011” is equivalent to __________
41 / 50
42 / 50
(A+B).(A+C) =
43 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
44 / 50
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47 / 50
An S-R latch can be implemented by using _________ gates
48 / 50
The device shown here is most likely a
49 / 50
The main use of the Multiplexer is to
50 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
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