CS302 Midterm Online Quiz

CS302-Midterm

1 / 50

The binary value “1010110” is equivalent to decimal __________

2 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

Low switching speeds, high power dissipation

Fast switching speeds, very low power dissipation

Fast switching speeds, high power dissipation

Low switching speeds, very low power dissipation

3 / 50

The binary value of 1010 is converted to the product term

TRUE

FALSE

4 / 50

Demultiplexer has

Multiple inputs and multiple outputs.

Single input and multiple outputs.

Multiple inputs and single output.

Single input and single outputs.

5 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

>B=0,A<B=1,A=B=1

>B=1,A<B=0,A=B=0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=0

6 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A>B=0,A<B=1,A=B=0

A > B = 1, A < B = 0, A = B = 0

A>B=0,A<B=1,A=B=1

A>B=1,A<B=0,A<B=1

7 / 50

The binary value “1010110” is equivalent to decimal __________

8 / 50

The diagram given below represents __________

Associative law

Demorgans law

Sum of product form

Product of sum form

9 / 50

The main use of the Multiplexer is to

Select data from multiple sources and to route to multiple destinations

Select data from multiple sources and to route it to a single Destination

Select data from Single source and to route it to a multiple Destinations

Select data from Single source and to route to single destination

10 / 50

A latch retains the state unless

Clock pulse is changed

Output is changed

Input is changed

Power is turned off

11 / 50

The Quad Multiplexer has _____ outputs

12 / 50

The Quad Multiplexer has _____ outputs

13 / 50

The ABEL symbol for “XOR” operation is

14 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

15 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

NOT

AND

XOR

16 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

FALSE

TRUE

17 / 50

The binary value of 1010 is converted to the product term

FALSE

TRUE

18 / 50

The function to be performed by the processor is selected by set of inputs known as ________

MicroOperation selectors

Function Select Inputs

OPCODE Selectors

Function Select Inputs

19 / 50

A latch has _____ stable states

Four

Two

Three

One

20 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

FALSE

TRUE

21 / 50

The GAL22V10 has ____ inputs

22 / 50

A Demultiplexer is not available commercially.

TRUE

FALSE

23 / 50

The diagram given below represents __________

Demorgans law

Product of sum form

Associative law

Sum of product form

24 / 50

The Unsigned Binary representation can only represent positive binary numbers

TRUE

FALSE

25 / 50

The Quad Multiplexer has _____ outputs

26 / 50

2's complement of any binary number can be calculated by

adding 1's complement twice

adding 1 to 1's complement

calculating 1's complement and inverting Most significant bit

subtracting 1 from 1's complement.

27 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

0.24582

24582

2.4582

24.582

28 / 50

The binary value “1010110” is equivalent to decimal __________

29 / 50

NOR gate is formed by connecting _________

OR Gate and then AND Gate

AND Gate and then OR Gate

OR Gate and then NOT Gate

NOT Gate and then OR Gate

30 / 50

The range of Excess-8 code is from ______ to ______

-9 to +8

+9 to -8

+7 to -8

+8 to -7

31 / 50

A SOP expression is equal to 1 ______________

At least one variable in domain of expression is present.

When one or more product terms in the expression are equal to 0.

When one or more product terms in the expression are equal to 1.

All the variables in domain of expression are present

32 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

33 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

Undefined

Zero

One

34 / 50

Demultiplexer has

Single input and multiple outputs.

Multiple inputs and single output.

Multiple inputs and multiple outputs.

Single input and single outputs.

35 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

4.5 to 5

0 to 3.5

4 to 4.5

0 to 4.5

36 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

37 / 50

A.(B+ C) = A.B + A.C is the expression of

Distributive Law

Demorgan‟s Law

Associative Law

Commutative Law

38 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

Invalid

SET

RESET

Clear

39 / 50

GAL is an acronym for ________.

Giant Array Logic

Generic Analysis Logic

General Array Logic

Generic Array Logic

40 / 50

In the binary number “10011” the weight of the most significant digit is ____

21 (2 raise to power 1)

23 (2 raise to power 3)

24 (2 raise to power 4)

20 (2 raise to power 0)

41 / 50

A.(B.C) = (A.B).C is an expression of __________

Demorgan‟s Law

Distributive Law

Commutative Law

Associative Law

42 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

TRUE

FALSE

43 / 50

"Sum-of-Weights" method is used __________

to encode data

to convert from serial to parralel data

to convert from one number system to other

to decode data

44 / 50

Caveman number system is Base _5 number system

45 / 50

A BCD to 7-Segment decoder has

7 inputs and 4 outputs

4 inputs and 7 outputs

3 inputs and 7 outputs

7 inputs and 3 outputs

46 / 50

A particular Full Adder has

3 inputs and 2 output

2 inputs and 3 output

3 inputs and 3 output

2 inputs and 2 output

47 / 50

The function to be performed by the processor is selected by set of inputs known as ____

Function Select Inputs

OPCODE Selectors

MicroOperation selectors

None of given option

48 / 50

The ABEL notation equivalent to Boolean expression A+B is:

A & B

A $ BL-21

A # B

A ! B

49 / 50

The ABEL symbol for “OR” operation is

50 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

4-input, 16-bit

2-input, 4-bit

4-input, 8-bit

2-input, 8-bit

Your score is

The average score is 44%