CS302 Midterm Online Quiz

CS302-Midterm

1 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

0.9 V

0.3 V

0.5 V

3.3 V

2 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

3 / 50

The GAL22V10 has ____ inputs

4 / 50

The binary value “1010110” is equivalent to decimal __________

5 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

6 / 50

The device shown here is most likely a

Multiplexer

Demultiplexer

Parity generator

Comparator

7 / 50

The ecimal “8” is represented as using Gray-Code.

1000

1100

1010

8 / 50

(A+B).(A+C) =

B+C

AC+B

AB+C

A+BC

9 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

TRUE

FALSE

10 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

XOR

NOT

AND

11 / 50

In the binary number “10011” the weight of the most significant digit is ____

20 (2 raise to power 0)

24 (2 raise to power 4)

21 (2 raise to power 1)

23 (2 raise to power 3)

12 / 50

A particular Full Adder has

3 inputs and 2 output

3 inputs and 3 output

2 inputs and 3 output

2 inputs and 2 output

13 / 50

The GAL22V10 has ____ inputs

14 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=1

A > B = 1, A < B = 0, A = B = 0

A>B=0,A<B=1,A=B=0

15 / 50

The Quad Multiplexer has _____ outputs

16 / 50

Half-Adder Logic circuit contains 2 XOR Gates

TRUE

FALSE

17 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

2-input, 4-bit

4-input, 16-bit

2-input, 8-bit

4-input, 8-bit

18 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

1111

111

110

1001

19 / 50

The binary value “1010110” is equivalent to decimal __________

20 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

21 / 50

The output A < B is set to 1 when the input combinations is

A=11, B=01

A=10, B=01

A=01, B=01

A=01, B=10

22 / 50

The maximum number that can be represented using unsigned octal system is _______

23 / 50

The expression _________ is an example of Commutative Law for Multiplication.

AB=BA

A(B+C) = B(A+C)

AB+C = A+BC

A+B=B+A

24 / 50

Sequential circuits have storage elements

FALSE

TRUE

25 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

26 / 50

Tri-State Buffer is basically a/an _________ gate.

NOT

AND

XOR

27 / 50

A Demultiplexer is not available commercially.

FALSE

TRUE

28 / 50

29 / 50

The output of an AND gate is one when _______

Any of the input is zero

Any of the input is one

All of the inputs are one

All the inputs are zero

30 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

31 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

24582

0.24582

24.582

2.4582

32 / 50

A.(B+ C) = A.B + A.C is the expression of

Distributive Law

Commutative Law

Demorgan‟s Law

Associative Law

33 / 50

A BCD to 7-Segment decoder has

4 inputs and 7 outputs

3 inputs and 7 outputs

7 inputs and 4 outputs

7 inputs and 3 outputs

34 / 50

Tri-State Buffer is basically a/an _________ gate.

XOR

AND

NOT

35 / 50

GAL is an acronym for ________.

Giant Array Logic

Generic Analysis Logic

Generic Array Logic

General Array Logic

36 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

37 / 50

The AND Gate performs a logical __________function

Division

Addition

Multiplication

Subtraction

38 / 50

The ABEL symbol for “XOR” operation is

39 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

FALSE

TRUE

40 / 50

The diagram given below represents __________

Sum of product form

Product of sum form

Demorgans law

Associative law

41 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

No output wire will be activated

14th

2nd

4th

42 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

TRUE

FALSE

43 / 50

Demultiplexer has

Single input and single outputs.

Single input and multiple outputs.

Multiple inputs and multiple outputs.

Multiple inputs and single output.

44 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A>B=0,A<B=1,A=B=0

A > B = 1, A < B = 0, A = B = 0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=1

45 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

7-bit

8-bit

2-bit

16-bit

46 / 50

The Quad Multiplexer has _____ outputs

47 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

48 / 50

A SOP expression is equal to 1 ______________

All the variables in domain of expression are present

When one or more product terms in the expression are equal to 1.

At least one variable in domain of expression is present.

When one or more product terms in the expression are equal to 0.

49 / 50

A logic circuit with an output consists of ________.

three AND gates, two OR gates, one inverter

two AND gates, one OR gate

two AND gates, two OR gates, two inverters

two AND gates, one OR gate, two inverters

50 / 50

Which one is true:

Power consumption of both CMOS and TTL depends on no. of gates in the circuit

Both TTL and CMOS have same power consumption

Power consumption of TTL is higher than of CMOS

Power consumption of CMOS is higher than of TTL

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