CS302 Midterm Online Quiz

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CS302-Midterm

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3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

2 / 50

  "Sum-of-Weights" method is used __________

3 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

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The ecimal “8” is represented as using Gray-Code.

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A Demultiplexer is not available commercially.

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The function to be performed by the processor is selected by set of inputs known as ____

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Following is standard POS expression

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Circuits having a bubble at their outputs are considered to have an active-low output.

9 / 50

The main use of the Multiplexer is to

10 / 50

A BCD to 7-Segment decoder has

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Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

12 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

13 / 50

The diagram given below represents __________

14 / 50

The Unsigned Binary representation can only represent positive binary numbers

15 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

16 / 50

The ABEL symbol for “OR” operation is

17 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

19 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

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Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

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The 4-bit 2‟s complement representation of “-7” is _____________

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The GAL22V10 has ____ inputs

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The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

24 / 50

An important application of AND Gate is its use in counter circuit

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A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

26 / 50

 The _______ Encoder is used as a keypad encoder.

27 / 50

The binary value “1010110” is equivalent to decimal __________

28 / 50

Half-Adder Logic circuit contains 2 XOR Gates

29 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

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 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

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A.(B+ C) = A.B + A.C is the expression of

32 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

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The Quad Multiplexer has _____ outputs 

34 / 50

A particular Full Adder has 

35 / 50

The binary value of 1010 is converted to the product term

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A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.

37 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

38 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

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For a 3-to-8 decoder how many 2-to-4 decoders will be required?

40 / 50

(A+B).(A+C) =  

41 / 50

A latch has _____ stable states

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 Tri-State Buffer is basically a/an _________ gate.

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Which one is true:

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The range of Excess-8 code is from ______ to ______

45 / 50

A particular Full Adder has

46 / 50

The diagram given below represents __________

47 / 50

  The Quad Multiplexer has _____ outputs

48 / 50

A BCD to 7-Segment decoder has

49 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

50 / 50

Demultiplexer has

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