CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

2 / 50

The GAL22V10 has ____ inputs

3 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

4 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

5 / 50

Caveman number system is Base _5 number system

6 / 50

Sequential circuits have storage elements

7 / 50

Tri-State Buffer is basically a/an _________ gate.

8 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

9 / 50

A Demultiplexer is not available commercially.

10 / 50

The output of an AND gate is one when _______

11 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

12 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

13 / 50

The Quad Multiplexer has _____ outputs

14 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

15 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

16 / 50

The Unsigned Binary representation can only represent positive binary numbers

17 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

18 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

19 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

20 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

21 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

22 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

23 / 50

An S-R latch can be implemented by using _________ gates

24 / 50

  The Quad Multiplexer has _____ outputs

25 / 50

The AND Gate performs a logical __________function

26 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

27 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

28 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

29 / 50

The diagram given below represents __________

30 / 50

TTL based devices work with a dc supply of ____ Volts

31 / 50

The output A < B is set to 1 when the input combinations is

32 / 50

"Sum-of-Weights" method is used __________ 

33 / 50

 The binary value “1010110” is equivalent to decimal __________

34 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

35 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

36 / 50

  "Sum-of-Weights" method is used __________

37 / 50

The ABEL notation equivalent to Boolean expression A+B is:

38 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

39 / 50

The ecimal “8” is represented as using Gray-Code.

40 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

41 / 50

In the binary number “10011” the weight of the most significant digit is ____

42 / 50

The binary value “1010110” is equivalent to decimal __________

43 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

44 / 50

The ecimal “8” is represented as using Gray-Code.

45 / 50

 Demultiplexer has

46 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

47 / 50

A latch has _____ stable states

48 / 50

Half-Adder Logic circuit contains 2 XOR Gates

49 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

50 / 50

 How many data select lines are required for selecting eight inputs?

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