CS302-Midterm
1 / 50
The range of Excess-8 code is from ______ to ______
2 / 50
The output of an AND gate is one when _______
3 / 50
The Quad Multiplexer has _____ outputs
4 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
5 / 50
A.(B+ C) = A.B + A.C is the expression of
6 / 50
The binary value of 1010 is converted to the product term
7 / 50
In the Karnaugh map shown above, which of the loops shown represents a legal grouping?
8 / 50
The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code
9 / 50
Demultiplexer has
10 / 50
Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.
11 / 50
A latch retains the state unless
12 / 50
A particular Full Adder has
13 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
14 / 50
15 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
16 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
17 / 50
How many data select lines are required for selecting eight inputs?
18 / 50
The AND Gate performs a logical __________function
19 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
20 / 50
An important application of AND Gate is its use in counter circuit
21 / 50
22 / 50
23 / 50
The diagram given below represents __________
24 / 50
25 / 50
A latch has _____ stable states
26 / 50
27 / 50
Caveman number system is Base _5 number system
28 / 50
A BCD to 7-Segment decoder has
29 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
30 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
31 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
32 / 50
33 / 50
The binary value “1010110” is equivalent to decimal __________
34 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
35 / 50
Generally, the Power dissipation of devices remains constant throughout their operation.
36 / 50
The Unsigned Binary representation can only represent positive binary numbers
37 / 50
The ABEL symbol for “XOR” operation is
38 / 50
"Sum-of-Weights" method is used __________
39 / 50
Tri-State Buffer is basically a/an _________ gate.
40 / 50
A standard POS form has __________ terms that have all the variables in the domain of the expression.
41 / 50
The values that exceed the specified range can not be correctly represented and are considered as ________
42 / 50
In the binary number “10011” the weight of the most significant digit is ____
43 / 50
The maximum number that can be represented using unsigned octal system is _______
44 / 50
The binary value “11011” is equivalent to __________
45 / 50
46 / 50
47 / 50
(A+B).(A+C) =
48 / 50
Half-Adder Logic circuit contains 2 XOR Gates
49 / 50
50 / 50
3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
Your score is
The average score is 44%
Restart quiz