CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

 The _______ Encoder is used as a keypad encoder.

2 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

3 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

4 / 50

The Quad Multiplexer has _____ outputs

5 / 50

 The maximum number that can be represented using unsigned octal system is _______

6 / 50

Demultiplexer has

7 / 50

The ABEL symbol for “XOR” operation is

8 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

9 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

10 / 50

"Sum-of-Weights" method is used __________ 

11 / 50

The range of Excess-8 code is from ______ to ______

12 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

13 / 50

The output A < B is set to 1 when the input combinations is __________

14 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

15 / 50

The output of an AND gate is one when _______

16 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

17 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

18 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

19 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

20 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

21 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

22 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

23 / 50

In the binary number “10011” the weight of the most significant digit is ____

24 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

25 / 50

A latch has _____ stable states

26 / 50

Caveman number system is Base _5 number system

27 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

28 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

29 / 50

The 4-bit 2’s complement representation of “+5” is _____________

30 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

31 / 50

The binary value “1010110” is equivalent to decimal __________

32 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

33 / 50

The Unsigned Binary representation can only represent positive binary numbers

34 / 50

The binary value of 1010 is converted to the product term

35 / 50

An important application of AND Gate is its use in counter circuit

36 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

37 / 50

 Demultiplexer has

38 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

39 / 50

2's complement of any binary number can be calculated by

40 / 50

Tri-State Buffer is basically a/an _________ gate.

41 / 50

Which one is true:

42 / 50

The GAL22V10 has ____ inputs

43 / 50

The GAL22V10 has ____ inputs

44 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

45 / 50

 The binary value “11011” is equivalent to __________

46 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

47 / 50

A.(B+ C) = A.B + A.C is the expression of

48 / 50

The Quad Multiplexer has _____ outputs 

49 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

50 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

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