CS302 Midterm Online Quiz

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CS302-Midterm

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The output A < B is set to 1 when the input combinations is

2 / 50

A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.

3 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

4 / 50

  The Quad Multiplexer has _____ outputs

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The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

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  The Quad Multiplexer has _____ outputs

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The values that exceed the specified range can not be correctly represented and are considered as ________

8 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

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3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

10 / 50

The range of Excess-8 code is from ______ to ______

11 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

12 / 50

The AND Gate performs a logical __________function

13 / 50

Half-Adder Logic circuit contains 2 XOR Gates

14 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

15 / 50

An S-R latch can be implemented by using _________ gates

16 / 50

The ecimal “8” is represented as using Gray-Code.

17 / 50

The device shown here is most likely a

18 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

19 / 50

The output of an AND gate is one when _______

20 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

21 / 50

TTL based devices work with a dc supply of ____ Volts

22 / 50

A.(B+ C) = A.B + A.C is the expression of

23 / 50

A logic circuit with an output  consists of ________.

24 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

25 / 50

 Demultiplexer has

26 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

27 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

28 / 50

The binary value “1010110” is equivalent to decimal __________

29 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

30 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

31 / 50

  "Sum-of-Weights" method is used __________

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If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

33 / 50

The Quad Multiplexer has _____ outputs

34 / 50

Tri-State Buffer is basically a/an _________ gate.

35 / 50

 The _______ Encoder is used as a keypad encoder.

36 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

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 The binary value “1010110” is equivalent to decimal __________

38 / 50

GAL is an acronym for ________.

39 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

40 / 50

The ecimal “8” is represented as using Gray-Code.

41 / 50

The diagram given below represents __________

42 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

43 / 50

The ABEL notation equivalent to Boolean expression A+B is:

44 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

45 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

46 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

47 / 50

All the ABEL equations must end with ________

48 / 50

A latch retains the state unless

49 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

50 / 50

 Demultiplexer has

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