CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

2 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

3 / 50

Tri-State Buffer is basically a/an _________ gate.

4 / 50

NOR gate is formed by connecting _________

5 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

6 / 50

A particular Full Adder has

7 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

8 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

9 / 50

The ABEL symbol for “OR” operation is

10 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

11 / 50

The 4-bit 2’s complement representation of “+5” is _____________

12 / 50

The ABEL symbol for “XOR” operation is

13 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

14 / 50

The function to be performed by the processor is selected by set of inputs known as ____

15 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

16 / 50

The binary value of 1010 is converted to the product term

17 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

18 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

19 / 50

The Unsigned Binary representation can only represent positive binary numbers

20 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

21 / 50

The output of an AND gate is one when _______

22 / 50

 The _______ Encoder is used as a keypad encoder.

23 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

24 / 50

2's complement of any binary number can be calculated by

25 / 50

Demultiplexer has

26 / 50

The Quad Multiplexer has _____ outputs

27 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

28 / 50

"Sum-of-Weights" method is used __________ 

29 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

30 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

31 / 50

A particular Full Adder has 

32 / 50

The range of Excess-8 code is from ______ to ______

33 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

34 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

35 / 50

The binary value “1010110” is equivalent to decimal __________

36 / 50

 Demultiplexer has

37 / 50

 The binary value “11011” is equivalent to __________

38 / 50

The binary value of 1010 is converted to the product term

39 / 50

The ecimal “8” is represented as using Gray-Code.

40 / 50

Sequential circuits have storage elements

41 / 50

The AND Gate performs a logical __________function

42 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

43 / 50

The diagram given below represents __________

44 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

45 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

46 / 50

A.(B.C) = (A.B).C is an expression of __________

47 / 50

An S-R latch can be implemented by using _________ gates

48 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

49 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

50 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

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