CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

A Demultiplexer is not available commercially.

2 / 50

 How many data select lines are required for selecting eight inputs?

3 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

4 / 50

A.(B.C) = (A.B).C is an expression of __________

5 / 50

TTL based devices work with a dc supply of ____ Volts

6 / 50

The Quad Multiplexer has _____ outputs

7 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

8 / 50

The ecimal “8” is represented as using Gray-Code.

9 / 50

A latch has _____ stable states

10 / 50

A BCD to 7-Segment decoder has

11 / 50

The Unsigned Binary representation can only represent positive binary numbers

12 / 50

NOR gate is formed by connecting _________

13 / 50

The diagram given below represents __________

14 / 50

The range of Excess-8 code is from ______ to ______

15 / 50

The output of an AND gate is one when _______

16 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

17 / 50

The 4-bit 2’s complement representation of “+5” is _____________

18 / 50

A particular Full Adder has

19 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

20 / 50

Demultiplexer has

21 / 50

A particular Full Adder has 

22 / 50

The output A < B is set to 1 when the input combinations is __________

23 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

24 / 50

The binary value of 1010 is converted to the product term

25 / 50

 A particular Full Adder has  

26 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

27 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

28 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

29 / 50

 The binary value “1010110” is equivalent to decimal __________

30 / 50

A.(B+ C) = A.B + A.C is the expression of

31 / 50

GAL is an acronym for ________.

32 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

33 / 50

Half-Adder Logic circuit contains 2 XOR Gates

34 / 50

(A+B).(A+C) =  

35 / 50

A SOP expression is equal to 1 ______________

36 / 50

 The _______ Encoder is used as a keypad encoder.

37 / 50

A BCD to 7-Segment decoder has

38 / 50

"Sum-of-Weights" method is used __________ 

39 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

40 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

41 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

42 / 50

A logic circuit with an output  consists of ________.

43 / 50

The GAL22V10 has ____ inputs

44 / 50

 Tri-State Buffer is basically a/an _________ gate.

45 / 50

The binary value “1010110” is equivalent to decimal __________

46 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

47 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

48 / 50

A latch retains the state unless

49 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

50 / 50

The range of Excess-8 code is from ______ to ______

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