CS302-Midterm
1 / 50
A BCD to 7-Segment decoder has
2 / 50
Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
3 / 50
Which one is true:
4 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
5 / 50
The binary value of 1010 is converted to the product term
6 / 50
Demultiplexer has
7 / 50
In the Karnaugh map shown above, which of the loops shown represents a legal grouping?
8 / 50
A particular Full Adder has
9 / 50
(A+B).(A+C) =
10 / 50
"Sum-of-Weights" method is used __________
11 / 50
The diagram given below represents __________
12 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
13 / 50
The ecimal “8” is represented as using Gray-Code.
14 / 50
Circuits having a bubble at their outputs are considered to have an active-low output.
15 / 50
The binary value “11011” is equivalent to __________
16 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
17 / 50
Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.
18 / 50
In ABEL the variable „A‟ is treated separately from variable „a‟
19 / 50
3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
20 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
21 / 50
A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.
22 / 50
A SOP expression is equal to 1 ______________
23 / 50
A.(B.C) = (A.B).C is an expression of __________
24 / 50
A latch retains the state unless
25 / 50
The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
26 / 50
27 / 50
A.(B+ C) = A.B + A.C is the expression of
28 / 50
An S-R latch can be implemented by using _________ gates
29 / 50
The binary value “1010110” is equivalent to decimal __________
30 / 50
The Unsigned Binary representation can only represent positive binary numbers
31 / 50
The main use of the Multiplexer is to
32 / 50
33 / 50
A logic circuit with an output consists of ________.
34 / 50
35 / 50
36 / 50
If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
37 / 50
How many data select lines are required for selecting eight inputs?
38 / 50
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
39 / 50
An important application of AND Gate is its use in counter circuit
40 / 50
The GAL22V10 has ____ inputs
41 / 50
High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
42 / 50
The Quad Multiplexer has _____ outputs
43 / 50
The _______ Encoder is used as a keypad encoder.
44 / 50
45 / 50
The function to be performed by the processor is selected by set of inputs known as ________
46 / 50
A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.
47 / 50
GAL is an acronym for ________.
48 / 50
GALcan be reprogrammed because instead of fuses __________logic is used in it
49 / 50
The 4-bit 2‟s complement representation of “-7” is _____________
50 / 50
The values that exceed the specified range can not be correctly represented and are considered as ________
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