CS302-Midterm
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Demultiplexer has
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The function to be performed by the processor is selected by set of inputs known as ____
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A latch has _____ stable states
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"Sum-of-Weights" method is used __________
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High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
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The ABEL symbol for “OR” operation is
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The binary value “1010110” is equivalent to decimal __________
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TTL based devices work with a dc supply of ____ Volts
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The ecimal “8” is represented as using Gray-Code.
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The range of Excess-8 code is from ______ to ______
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The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code
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The diagram given below represents __________
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
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The GAL22V10 has ____ inputs
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A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.
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The ABEL symbol for “XOR” operation is
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(A+B).(A+C) =
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NOR Gate can be used to perform the operation of AND, OR and NOT Gate
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The Quad Multiplexer has _____ outputs
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All the ABEL equations must end with ________
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A Demultiplexer is not available commercially.
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The binary value of 1010 is converted to the product term
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For a 3-to-8 decoder how many 2-to-4 decoders will be required?
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An S-R latch can be implemented by using _________ gates
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Sequential circuits have storage elements
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A standard POS form has __________ terms that have all the variables in the domain of the expression.
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GAL is an acronym for ________.
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2's complement of any binary number can be calculated by
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3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
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The binary value “11011” is equivalent to __________
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NOR gate is formed by connecting _________
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A particular Full Adder has
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The Unsigned Binary representation can only represent positive binary numbers
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Which one is true:
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Two 2-bit comparator circuits can be connected to form single 4-bit comparator
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The 4-bit 2’s complement representation of “+5” is _____________
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The output of an AND gate is one when _______
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If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
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The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
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If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
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The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
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