CS302-Midterm
1 / 50
A standard POS form has __________ terms that have all the variables in the domain of the expression.
2 / 50
A latch has _____ stable states
3 / 50
Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.
4 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
5 / 50
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
6 / 50
Half-Adder Logic circuit contains 2 XOR Gates
7 / 50
The device shown here is most likely a
8 / 50
An S-R latch can be implemented by using _________ gates
9 / 50
The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
10 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
11 / 50
Following is standard POS expression
12 / 50
13 / 50
The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms
14 / 50
The ABEL symbol for “OR” operation is
15 / 50
A SOP expression is equal to 1 ______________
16 / 50
The ecimal “8” is represented as using Gray-Code.
17 / 50
If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
18 / 50
The Quad Multiplexer has _____ outputs
19 / 50
The function to be performed by the processor is selected by set of inputs known as ________
20 / 50
The GAL22V10 has ____ inputs
21 / 50
Two 2-bit comparator circuits can be connected to form single 4-bit comparator
22 / 50
The ABEL symbol for “XOR” operation is
23 / 50
"Sum-of-Weights" method is used __________
24 / 50
The OR Gate performs a Boolean _______ function
25 / 50
NOR gate is formed by connecting _________
26 / 50
The binary value “1010110” is equivalent to decimal __________
27 / 50
How many data select lines are required for selecting eight inputs?
28 / 50
29 / 50
Circuits having a bubble at their outputs are considered to have an active-low output.
30 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
31 / 50
The binary value of 1010 is converted to the product term
32 / 50
A particular Full Adder has
33 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
34 / 50
High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
35 / 50
The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10
36 / 50
The binary value “11011” is equivalent to __________
37 / 50
TTL based devices work with a dc supply of ____ Volts
38 / 50
The range of Excess-8 code is from ______ to ______
39 / 50
A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.
40 / 50
GALcan be reprogrammed because instead of fuses __________logic is used in it
41 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
42 / 50
A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.
43 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
44 / 50
The AND Gate performs a logical __________function
45 / 50
The function to be performed by the processor is selected by set of inputs known as ____
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47 / 50
A.(B+ C) = A.B + A.C is the expression of
48 / 50
NOR Gate can be used to perform the operation of AND, OR and NOT Gate
49 / 50
2's complement of any binary number can be calculated by
50 / 50
Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.
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