CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

2 / 50

The ABEL symbol for “OR” operation is

3 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

4 / 50

A BCD to 7-Segment decoder has

5 / 50

 A particular Full Adder has  

6 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

7 / 50

The GAL22V10 has ____ inputs

8 / 50

A SOP expression is equal to 1 ______________

9 / 50

 The maximum number that can be represented using unsigned octal system is _______

10 / 50

The binary value of 1010 is converted to the product term

11 / 50

Which one is true:

12 / 50

Half-Adder Logic circuit contains 2 XOR Gates

13 / 50

 Demultiplexer has

14 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

15 / 50

TTL based devices work with a dc supply of ____ Volts

16 / 50

 Tri-State Buffer is basically a/an _________ gate.

17 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

18 / 50

The 4-bit 2’s complement representation of “+5” is _____________

19 / 50

The range of Excess-8 code is from ______ to ______

20 / 50

Demultiplexer has

21 / 50

 The binary value “11011” is equivalent to __________

22 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

23 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

24 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

25 / 50

The AND Gate performs a logical __________function

26 / 50

The binary value “1010110” is equivalent to decimal __________

27 / 50

A.(B.C) = (A.B).C is an expression of __________

28 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

29 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

30 / 50

All the ABEL equations must end with ________

31 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

32 / 50

The ABEL symbol for “XOR” operation is

33 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

34 / 50

A BCD to 7-Segment decoder has

35 / 50

The function to be performed by the processor is selected by set of inputs known as ____

36 / 50

Sequential circuits have storage elements

37 / 50

NOR gate is formed by connecting _________

38 / 50

An important application of AND Gate is its use in counter circuit

39 / 50

The ABEL notation equivalent to Boolean expression A+B is:

40 / 50

A Demultiplexer is not available commercially.

41 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

42 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

43 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

44 / 50

The output of an AND gate is one when _______

45 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

46 / 50

Caveman number system is Base _5 number system

47 / 50

 The binary value “1010110” is equivalent to decimal __________

48 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

49 / 50

Tri-State Buffer is basically a/an _________ gate.

50 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

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