CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

Demultiplexer has

2 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

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A.(B.C) = (A.B).C is an expression of __________

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The Unsigned Binary representation can only represent positive binary numbers

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The ABEL symbol for “OR” operation is

6 / 50

A particular Full Adder has 

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 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

8 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

9 / 50

A particular Full Adder has

10 / 50

The output A < B is set to 1 when the input combinations is __________

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The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

12 / 50

A SOP expression is equal to 1 ______________

13 / 50

  The Quad Multiplexer has _____ outputs

14 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

15 / 50

 The _______ Encoder is used as a keypad encoder.

16 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

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The range of Excess-8 code is from ______ to ______

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The range of Excess-8 code is from ______ to ______

19 / 50

Following is standard POS expression

20 / 50

The binary value of 1010 is converted to the product term

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Circuits having a bubble at their outputs are considered to have an active-low output.

22 / 50

The 4-bit 2’s complement representation of “+5” is _____________

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The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

24 / 50

 The maximum number that can be represented using unsigned octal system is _______

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  "Sum-of-Weights" method is used __________

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Which one is true:

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 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

28 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

29 / 50

 The binary value “11011” is equivalent to __________

30 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

31 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

32 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

33 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

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Sequential circuits have storage elements

35 / 50

A logic circuit with an output  consists of ________.

36 / 50

 Demultiplexer has

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Two 2-bit comparator circuits can be connected to form single 4-bit comparator

38 / 50

The binary value of 1010 is converted to the product term

39 / 50

The Quad Multiplexer has _____ outputs

40 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

41 / 50

(A+B).(A+C) =  

42 / 50

The GAL22V10 has ____ inputs

43 / 50

TTL based devices work with a dc supply of ____ Volts

44 / 50

An S-R latch can be implemented by using _________ gates

45 / 50

The output A < B is set to 1 when the input combinations is

46 / 50

 Tri-State Buffer is basically a/an _________ gate.

47 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

48 / 50

The output of an AND gate is one when _______

49 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

50 / 50

2's complement of any binary number can be calculated by

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