CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

2 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

3 / 50

The ecimal “8” is represented as using Gray-Code.

4 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

5 / 50

A BCD to 7-Segment decoder has

6 / 50

A Demultiplexer is not available commercially.

7 / 50

Following is standard POS expression

8 / 50

A.(B.C) = (A.B).C is an expression of __________

9 / 50

The diagram given below represents __________

10 / 50

The GAL22V10 has ____ inputs

11 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

12 / 50

The Quad Multiplexer has _____ outputs

13 / 50

A BCD to 7-Segment decoder has

14 / 50

Caveman number system is Base _5 number system

15 / 50

A.(B+ C) = A.B + A.C is the expression of

16 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

17 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

18 / 50

The ABEL symbol for “OR” operation is

19 / 50

NOR gate is formed by connecting _________

20 / 50

Tri-State Buffer is basically a/an _________ gate.

21 / 50

The AND Gate performs a logical __________function

22 / 50

  "Sum-of-Weights" method is used __________

23 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

24 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

25 / 50

 A particular Full Adder has  

26 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

27 / 50

The GAL22V10 has ____ inputs

28 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

29 / 50

Which one is true:

30 / 50

The diagram given below represents __________

31 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

32 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

33 / 50

The device shown here is most likely a

34 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

35 / 50

Half-Adder Logic circuit contains 2 XOR Gates

36 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

37 / 50

An important application of AND Gate is its use in counter circuit

38 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

39 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

40 / 50

A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.

41 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

42 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

43 / 50

 How many data select lines are required for selecting eight inputs?

44 / 50

 The binary value “11011” is equivalent to __________

45 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

46 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

47 / 50

Which one is true:

48 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

49 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

50 / 50

All the ABEL equations must end with ________

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