CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

 The maximum number that can be represented using unsigned octal system is _______

2 / 50

The output A < B is set to 1 when the input combinations is

3 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

4 / 50

Demultiplexer has

5 / 50

In the binary number “10011” the weight of the most significant digit is ____

6 / 50

A particular Full Adder has

7 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

8 / 50

 The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

9 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

10 / 50

The binary value “1010110” is equivalent to decimal __________

11 / 50

"Sum-of-Weights" method is used __________ 

12 / 50

The function to be performed by the processor is selected by set of inputs known as ____

13 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

14 / 50

 The binary value “11011” is equivalent to __________

15 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

16 / 50

 How many data select lines are required for selecting eight inputs?

17 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

18 / 50

TTL based devices work with a dc supply of ____ Volts

19 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

20 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

21 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

22 / 50

The ecimal “8” is represented as using Gray-Code.

23 / 50

The diagram given below represents __________

24 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

25 / 50

 The _______ Encoder is used as a keypad encoder.

26 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

27 / 50

The 4-bit 2’s complement representation of “+5” is _____________

28 / 50

A logic circuit with an output  consists of ________.

29 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

30 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

31 / 50

The Unsigned Binary representation can only represent positive binary numbers

32 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

33 / 50

(A+B).(A+C) =  

34 / 50

The output A < B is set to 1 when the input combinations is __________

35 / 50

A.(B+ C) = A.B + A.C is the expression of

36 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

37 / 50

The Quad Multiplexer has _____ outputs

38 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

39 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

40 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

41 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

42 / 50

Which one is true:

43 / 50

GAL is an acronym for ________.

44 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

45 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

46 / 50

The ecimal “8” is represented as using Gray-Code.

47 / 50

The OR Gate performs a Boolean _______ function

48 / 50

The Quad Multiplexer has _____ outputs 

49 / 50

A particular Full Adder has 

50 / 50

A latch has _____ stable states

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