CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

2 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

3 / 50

  The Quad Multiplexer has _____ outputs

4 / 50

 How many data select lines are required for selecting eight inputs?

5 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

6 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

7 / 50

 The expression _________ is an example of Commutative Law for Multiplication.

8 / 50

The ABEL symbol for “XOR” operation is

9 / 50

The binary value “1010110” is equivalent to decimal __________

10 / 50

GAL is an acronym for ________.

11 / 50

 The _______ Encoder is used as a keypad encoder.

12 / 50

A Demultiplexer is not available commercially.

13 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

14 / 50

A SOP expression having a domain of 3 variables will have a truth table having ____combinations of inputs and corresponding output values.

15 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

16 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

17 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

18 / 50

Following is standard POS expression

19 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

20 / 50

The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.

21 / 50

An S-R latch can be implemented by using _________ gates

22 / 50

Caveman number system is Base _5 number system

23 / 50

  "Sum-of-Weights" method is used __________

24 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

25 / 50

 Demultiplexer has

26 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

27 / 50

A BCD to 7-Segment decoder has

28 / 50

The ABEL symbol for “OR” operation is

29 / 50

TTL based devices work with a dc supply of ____ Volts

30 / 50

A particular Full Adder has 

31 / 50

The AND Gate performs a logical __________function

32 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

33 / 50

The output A < B is set to 1 when the input combinations is __________

34 / 50

Tri-State Buffer is basically a/an _________ gate.

35 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

36 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

37 / 50

The ecimal “8” is represented as using Gray-Code.

38 / 50

"Sum-of-Weights" method is used __________ 

39 / 50

An important application of AND Gate is its use in counter circuit

40 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

41 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

42 / 50

A BCD to 7-Segment decoder has

43 / 50

  The Quad Multiplexer has _____ outputs

44 / 50

A particular Full Adder has

45 / 50

A SOP expression is equal to 1 ______________

46 / 50

A.(B+ C) = A.B + A.C is the expression of

47 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

48 / 50

Demultiplexer has

49 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

50 / 50

In the binary number “10011” the weight of the most significant digit is ____

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