CS302-Midterm
1 / 50
A.(B.C) = (A.B).C is an expression of __________
2 / 50
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
3 / 50
The OR Gate performs a Boolean _______ function
4 / 50
The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms
5 / 50
For a 3-to-8 decoder how many 2-to-4 decoders will be required?
6 / 50
If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:
7 / 50
Demultiplexer has
8 / 50
The binary value of 1010 is converted to the product term
9 / 50
"Sum-of-Weights" method is used __________
10 / 50
Generally, the Power dissipation of devices remains constant throughout their operation.
11 / 50
The range of Excess-8 code is from ______ to ______
12 / 50
TTL based devices work with a dc supply of ____ Volts
13 / 50
Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.
14 / 50
15 / 50
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
16 / 50
A standard POS form has __________ terms that have all the variables in the domain of the expression.
17 / 50
The device shown here is most likely a
18 / 50
In the binary number “10011” the weight of the most significant digit is ____
19 / 50
20 / 50
Sequential circuits have storage elements
21 / 50
The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
22 / 50
A latch has _____ stable states
23 / 50
A logic circuit with an output consists of ________.
24 / 50
A SOP expression is equal to 1 ______________
25 / 50
The ABEL symbol for “OR” operation is
26 / 50
Half-Adder Logic circuit contains 2 XOR Gates
27 / 50
An S-R latch can be implemented by using _________ gates
28 / 50
29 / 50
30 / 50
31 / 50
(A+B).(A+C) =
32 / 50
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
33 / 50
The binary value “11011” is equivalent to __________
34 / 50
The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms
35 / 50
How many data select lines are required for selecting eight inputs?
36 / 50
The ecimal “8” is represented as using Gray-Code.
37 / 50
The binary value “1010110” is equivalent to decimal __________
38 / 50
The expression _________ is an example of Commutative Law for Multiplication.
39 / 50
The _______ Encoder is used as a keypad encoder.
40 / 50
Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.
41 / 50
The GAL22V10 has ____ inputs
42 / 50
43 / 50
The Quad Multiplexer has _____ outputs
44 / 50
45 / 50
The diagram given below represents __________
46 / 50
47 / 50
The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code
48 / 50
49 / 50
In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
50 / 50
The output A < B is set to 1 when the input combinations is
Your score is
The average score is 44%
Restart quiz
