CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

All the ABEL equations must end with ________

2 / 50

The ecimal “8” is represented as using Gray-Code.

3 / 50

  The Quad Multiplexer has _____ outputs

4 / 50

2's complement of any binary number can be calculated by

5 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

6 / 50

The ecimal “8” is represented as using Gray-Code.

7 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

8 / 50

The Quad Multiplexer has _____ outputs

9 / 50

The Unsigned Binary representation can only represent positive binary numbers

10 / 50

  "Sum-of-Weights" method is used __________

11 / 50

The GAL22V10 has ____ inputs

12 / 50

Generally, the Power dissipation of _______ devices remains constant throughout their operation.

13 / 50

A particular Full Adder has

14 / 50

The binary value of 1010 is converted to the product term

15 / 50

An S-R latch can be implemented by using _________ gates

16 / 50

A SOP expression is equal to 1 ______________

17 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

18 / 50

In the binary number “10011” the weight of the most significant digit is ____

19 / 50

The binary value “1010110” is equivalent to decimal __________

20 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

21 / 50

3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions

22 / 50

The binary value “1010110” is equivalent to decimal __________

23 / 50

Which one is true:

24 / 50

 How many data select lines are required for selecting eight inputs?

25 / 50

The binary value of 1010 is converted to the product term

26 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

27 / 50

The ABEL notation equivalent to Boolean expression A+B is:

28 / 50

Sequential circuits have storage elements

29 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

30 / 50

Half-Adder Logic circuit contains 2 XOR Gates

31 / 50

Two 2-bit comparator circuits can be connected to form single 4-bit comparator

32 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

33 / 50

The OLMC of the GAL16V8 is _______ to the OLMC of the GAL22V10

34 / 50

The AND Gate performs a logical __________function

35 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

36 / 50

Demultiplexer has

37 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

38 / 50

Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer.

39 / 50

GALcan be reprogrammed because instead of fuses __________logic is used in it

40 / 50

The 4-variable Karnaugh Map (K-Map) has ______cells for min or max terms

41 / 50

The ABEL symbol for “OR” operation is

42 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

43 / 50

A Demultiplexer is not available commercially.

44 / 50

A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.

45 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

46 / 50

A.(B+ C) = A.B + A.C is the expression of

47 / 50

GAL is an acronym for ________.

48 / 50

A BCD to 7-Segment decoder has

49 / 50

Which one is true:

50 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

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