CS302 Midterm Online Quiz

CS302-Midterm

1 / 50

The GAL22V10 has ____ inputs

2 / 50

A particular Full Adder has

3 inputs and 3 output

2 inputs and 2 output

3 inputs and 2 output

2 inputs and 3 output

3 / 50

"Sum-of-Weights" method is used __________

to encode data

to decode data

to convert from one number system to other

to convert from serial to parralel data

4 / 50

The binary value “11011” is equivalent to __________

E2.

5 / 50

GAL is an acronym for ________.

Generic Analysis Logic

General Array Logic

Generic Array Logic

Giant Array Logic

6 / 50

The binary value “1010110” is equivalent to decimal __________

7 / 50

High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________

0.3 V

0.5 V

3.3 V

0.9 V

8 / 50

The expression _________ is an example of Commutative Law for Multiplication.

AB+C = A+BC

A+B=B+A

AB=BA

A(B+C) = B(A+C)

9 / 50

The device shown here is most likely a

Parity generator

Demultiplexer

Multiplexer

Comparator

10 / 50

"Sum-of-Weights" method is used __________

to decode data

to encode data

to convert from one number system to other

to convert from serial to parralel data

11 / 50

Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer

A 2-to-8 bit decoder

A parallel to serial converter circuit

A counter circuit

A BCD to Decimal decoder

12 / 50

If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________

0.24582

24582

2.4582

24.582

13 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

TRUE

FALSE

14 / 50

Tri-State Buffer is basically a/an _________ gate.

NOT

AND

XOR

15 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A > B = 1, A < B = 0, A = B = 0

A>B=1,A<B=0,A<B=1

A>B=0,A<B=1,A=B=0

A>B=0,A<B=1,A=B=1

16 / 50

The binary value of 1010 is converted to the product term

FALSE

TRUE

17 / 50

A SOP expression is equal to 1 ______________

When one or more product terms in the expression are equal to 1.

All the variables in domain of expression are present

At least one variable in domain of expression is present.

When one or more product terms in the expression are equal to 0.

18 / 50

A latch retains the state unless

Power is turned off

Output is changed

Clock pulse is changed

Input is changed

19 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

20 / 50

In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits

64-bits

8-bits

32-bits

16-bits

21 / 50

If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________

22 / 50

The output A < B is set to 1 when the input combinations is

A=10, B=01

A=11, B=01

A=01, B=10

A=01, B=01

23 / 50

The Quad Multiplexer has _____ outputs

24 / 50

Which one is true:

Power consumption of TTL is higher than of CMOS

Power consumption of CMOS is higher than of TTL

Both TTL and CMOS have same power consumption

Power consumption of both CMOS and TTL depends on no. of gates in the circuit.

25 / 50

The range of Excess-8 code is from ______ to ______

-9 to +8

+8 to -7

+9 to -8

+7 to -8

26 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

Parity

Sign value

Overflow

Carry

27 / 50

(A+B).(A+C) =

B+C

A+BC

AB+C

AC+B

28 / 50

A particular Full Adder has

2 inputs and 2 output

3 inputs and 3 output

2 inputs and 3 output

3 inputs and 2 output

29 / 50

2's complement of any binary number can be calculated by

adding 1 to 1's complement

calculating 1's complement and inverting Most significant bit

adding 1's complement twice

subtracting 1 from 1's complement.

30 / 50

The 3-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

31 / 50

The AND Gate performs a logical __________function

Division

Subtraction

Addition

Multiplication

32 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

Power dissipation of all circuits increases with time.

CMOS 5 Series

TTL

CMOS 3.5 series

33 / 50

A BCD to 7-Segment decoder has

7 inputs and 3 outputs

3 inputs and 7 outputs

4 inputs and 7 outputs

inputs and 4 outputs

34 / 50

The output A < B is set to 1 when the input combinations is __________

A=11, B=01

A=01, B=10

A=10, B=01

A=01, B=01

35 / 50

The GAL22V10 has ____ inputs

36 / 50

Caveman number system is Base _5 number system

37 / 50

The ecimal “8” is represented as using Gray-Code.

1000

1010

1100

38 / 50

The main use of the Multiplexer is to

Select data from Single source and to route to single destination

Select data from multiple sources and to route it to a single Destination

Select data from Single source and to route it to a multiple Destinations

Select data from multiple sources and to route to multiple destinations

39 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

0 to 3.5

4.5 to 5

4 to 4.5

0 to 4.5

40 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

RESET

Invalid

Clear

SET

41 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

8-bit

2-bit

7-bit

16-bit

42 / 50

The 4-bit 2’s complement representation of “+5” is _____________

1110

10120

1010

1011

43 / 50

44 / 50

In the binary number “10011” the weight of the most significant digit is ____

23 (2 raise to power 3)

20 (2 raise to power 0)

21 (2 raise to power 1)

24 (2 raise to power 4)

45 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

8-bit

2-bit

7-bit

16-bit

46 / 50

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

>B=1,A<B=0,A=B=0

A>B=0,A<B=1,A=B=0

A>B=1,A<B=0,A<B=1

>B=0,A<B=1,A=B=1

47 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

FALSE

TRUE

48 / 50

An S-R latch can be implemented by using _________ gates

NAND, NOR

AND, OR

NOT, XOR

NAND, XOR

49 / 50

The Quad Multiplexer has _____ outputs

50 / 50

The diagram given below represents __________

Product of sum form

Demorgans law

Sum of product form

Associative law

Your score is

The average score is 44%