CS302-Midterm
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Using multiplexer as parallel to serial converter requires ___________ connected to the multiplexer
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TTL based devices work with a dc supply of ____ Volts
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The Quad Multiplexer has _____ outputs
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"Sum-of-Weights" method is used __________
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Demultiplexer has
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3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions
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Two 2-bit comparator circuits can be connected to form single 4-bit comparator
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The ecimal “8” is represented as using Gray-Code.
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The 4-bit 2’s complement representation of “+5” is _____________
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If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
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In ANSI/IEEE Standard 754 “Mantissa” is represented by 32-bits bits
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The ABEL symbol for “OR” operation is
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If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.
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The GAL22V10 has ____ inputs
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Circuits having a bubble at their outputs are considered to have an active-low output.
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A particular Full Adder has
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For a 3-to-8 decoder how many 2-to-4 decoders will be required?
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The binary value of 1010 is converted to the product term
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The values that exceed the specified range can not be correctly represented and are considered as ________
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The PROMconsists of a fixed non-programmable ____________ Gate array configured as a decoder.
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The binary value “1010110” is equivalent to decimal __________
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If we add “723” and “134” by representing them in floating point notation i.e. by first, converting them in floating point representation and then adding them, the value of exponent of result will be ________
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How many data select lines are required for selecting eight inputs?
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Caveman number system is Base _5 number system
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A BCD to 7-Segment decoder has
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An important application of AND Gate is its use in counter circuit
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The diagram given below represents __________
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The output of an AND gate is one when _______
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The function to be performed by the processor is selected by set of inputs known as ________
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The OR Gate performs a Boolean _______ function
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A standard POS form has __________ terms that have all the variables in the domain of the expression.
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Tri-State Buffer is basically a/an _________ gate.
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The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
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The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.
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Sequential circuits have storage elements
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The output A < B is set to 1 when the input combinations is
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A.(B+ C) = A.B + A.C is the expression of
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In the Karnaugh map shown above, which of the loops shown represents a legal grouping?
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GAL is an acronym for ________.
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Which one is true:
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