CS302 Midterm Online Quiz

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CS302-Midterm

1 / 50

The binary value of 1010 is converted to the product term

2 / 50

 A particular Full Adder has  

3 / 50

 The maximum number that can be represented using unsigned octal system is _______

4 / 50

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.

5 / 50

A particular Full Adder has

6 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

7 / 50

A standard POS form has __________ terms that have all the variables in the domain of the expression.

8 / 50

A Demultiplexer is not available commercially.

9 / 50

 For a 3-to-8 decoder how many 2-to-4 decoders will be required?

10 / 50

Circuits having a bubble at their outputs are considered to have an active-low output.

11 / 50

The OR Gate performs a Boolean _______ function

12 / 50

Sequential circuits have storage elements

13 / 50

The diagram given below represents __________

14 / 50

The ecimal “8” is represented as using Gray-Code.

15 / 50

Consider a circuit consisting of two consecutive NOT gates, the entire circuit belongs to a CMOS 5 Volt series, if certain voltage is applied on the input, the output voltage of Logic high signal (VoH) will be in the range of _______ volts.

16 / 50

Which one is true:

17 / 50

In the Karnaugh map shown above, which of the loops shown represents a legal grouping?

18 / 50

Generally, the Power dissipation of devices remains constant throughout their operation.

19 / 50

The diagram given below represents __________

20 / 50

NOR gate is formed by connecting _________

21 / 50

The ABEL notation equivalent to Boolean expression A+B is:

22 / 50

The 4-bit 2‟s complement representation of “-7” is _____________

23 / 50

For a 3-to-8 decoder how many 2-to-4 decoders will be required?

24 / 50

The range of Excess-8 code is from ______ to ______

25 / 50

If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be________.

26 / 50

The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms

27 / 50

A latch retains the state unless

28 / 50

A SOP expression is equal to 1 ______________

29 / 50

The values that exceed the specified range can not be correctly represented and are considered as ________

30 / 50

TTL based devices work with a dc supply of ____ Volts

31 / 50

NOR Gate can be used to perform the operation of AND, OR and NOT Gate

32 / 50

A.(B.C) = (A.B).C is an expression of __________

33 / 50

  The Quad Multiplexer has _____ outputs

34 / 50

The main use of the Multiplexer is to

35 / 50

The ABEL symbol for “OR” operation is

36 / 50

The GAL22V10 has ____ inputs

37 / 50

A Karnaugh map is similar to a truth table because it presents all the possible values of inputvariables and the resulting output of each value.

38 / 50

The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ hererepresents OR Gate.

39 / 50

The AND Gate performs a logical __________function

40 / 50

A BCD to 7-Segment decoder has

41 / 50

The Quad Multiplexer has _____ outputs

42 / 50

Half-Adder Logic circuit contains 2 XOR Gates

43 / 50

Tri-State Buffer is basically a/an _________ gate.

44 / 50

Caveman number system is Base _5 number system

45 / 50

In ABEL the variable „A‟ is treated separately from variable „a‟

46 / 50

A latch has _____ stable states

47 / 50

 The function to be performed by the processor is selected by set of inputs known as ________

48 / 50

  The Quad Multiplexer has _____ outputs

49 / 50

The Extended ASCII Code (American Standard Code for Information Interchange) is a _____ code

50 / 50

If“1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated:

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