CS501-Midterm
1 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
2 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
3 / 50
What is the instruction length of the SRC processor?
4 / 50
________ operation is required to change the processor‟s state to a known, defined value.
5 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
6 / 50
Which one of the following register holds the instruction that is being executed?
7 / 50
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
8 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
9 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
10 / 50
-------------- performs the data operations as commanded by the program instructions.
11 / 50
The external interface of FALCON-A consists of a ________ data bus.
12 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write
13 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
14 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
15 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
16 / 50
Which one of the following portions of an instruction represents the operation to be performed?
17 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
18 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
19 / 50
The external interface of FALCON-A consists of a ______address bus and ______a data bus.
20 / 50
Motorola MC68000 is an example of ---------microprocessor.
21 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
22 / 50
Which one of the following is the memory organization of EAGLE processor?
23 / 50
What does the instruction “ldr R3, 58” of SRC do?
24 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
25 / 50
which type of instructions help in changing the flow of the program as and when required?
26 / 50
What is the instruction length of the FALCON-A processor?
27 / 50
Computer system performance is usually measured by the ---------------
28 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
29 / 50
Which field of the machine language instruction is the “type of operation” that is to be performed?
30 / 50
Which one of the following registers holds the address of the next instruction to be executed?
31 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
32 / 50
What is the size of the memory space that is available to FALCON-A processor?
33 / 50
Which instruction is used to store register to memory using relative address?
34 / 50
35 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
36 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
37 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
38 / 50
Which one of the following is the memory organization of FALCON-E processor?
39 / 50
Execution time of a program with respect to the processor is calculated as:
40 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
41 / 50
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
42 / 50
There are _________ types of reset operations in SRC
43 / 50
What is the working of Processor Status Word (PSW)?
44 / 50
The code size of 2-address instruction is ________________.
45 / 50
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
46 / 50
Which of the instruction is used to load register from memory using a relative address?
47 / 50
_____________ controller controls the sequence of the flow of microinstructions.
48 / 50
What functionality is performed by the instruction “str R8, 34” of SRC?
49 / 50
Type A of SRC has which of the following instructions?
50 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
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