CS501-Midterm
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Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
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In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
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Execution time of a program with respect to the processor is calculated as:
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Type A of SRC has which of the following instructions?
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Which one of the following register holds the instruction that is being executed?
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Which instruction is used to store register to memory using relative address?
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The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
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-------------- performs the data operations as commanded by the program instructions.
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Which one of the following portions of an instruction represents the operation to be performed?
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Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
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Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
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_____________ controller controls the sequence of the flow of microinstructions.
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To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
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What is the instruction length of the SRC processor?
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-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
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An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
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Which of the instruction is used to load register from memory using a relative address?
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Motorola MC68000 is an example of ---------microprocessor.
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The code size of 2-address instruction is ________________.
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Which field of the machine language instruction is the “type of operation” that is to be performed?
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What is the working of Processor Status Word (PSW)?
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Which one of the following registers holds the instruction that is being executed?
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_____________all memory systems are dumb, in that they respond to only two commands: read or write
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What functionality is performed by the instruction “str R8, 34” of SRC?
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The external interface of FALCON-A consists of a ______address bus and ______a data bus.
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Which one of the following is a bi-stable device, capable of storing one bit of information?
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In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
29 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
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The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
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What is the instruction length of the FALCON-A processor?
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There are _________ types of reset operations in SRC
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Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
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How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
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________ operation is required to change the processor‟s state to a known, defined value.
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_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
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In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
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FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
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Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
40 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
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FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
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Which one of the following registers holds the address of the next instruction to be executed?
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Which one of the following is the memory organization of EAGLE processor?
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___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
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Computer system performance is usually measured by the ---------------
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What is the size of the memory space that is available to FALCON-A processor?
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The external interface of FALCON-A consists of a ________ data bus.
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What functionality is performed by the instruction “lar R3, 36” of SRC?
49 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
50 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
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