CS501-Midterm
1 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
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Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
3 / 50
The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
4 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
5 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
6 / 50
Almost every commercial computer has its own particular ---------- language
7 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
8 / 50
What functionality is performed by the instruction “str R8, 34” of SRC?
9 / 50
________ operation is required to change the processor‟s state to a known, defined value.
10 / 50
“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
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For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
12 / 50
The code size of 2-address instruction is ________________.
13 / 50
The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
14 / 50
Which one of the following is the memory organization of FALCON-E processor?
15 / 50
-------------- performs the data operations as commanded by the program instructions.
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What is the size of the memory space that is available to FALCON-A processor?
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Which one of the following registers holds the address of the next instruction to be executed?
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_____________all memory systems are dumb, in that they respond to only two commands: read or write.
19 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
20 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
21 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
22 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
23 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
24 / 50
Type A of SRC has which of the following instructions?
25 / 50
What is the instruction length of the SRC processor?
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In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
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The external interface of FALCON-A consists of a ________ data bus.
28 / 50
Which one of the following portions of an instruction represents the operation to be performed?
29 / 50
What is the working of Processor Status Word (PSW)?
30 / 50
Which one of the following is a bi-stable device, capable of storing one bit of information?
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_____________ controller controls the sequence of the flow of microinstructions.
32 / 50
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
33 / 50
Which one of the following is the memory organization of EAGLE processor?
34 / 50
What is the instruction length of the FALCON-A processor?
35 / 50
Which instruction is used to store register to memory using relative address?
36 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
37 / 50
Motorola MC68000 is an example of ---------microprocessor.
38 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
39 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
40 / 50
41 / 50
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
42 / 50
Which one of the following registers holds the instruction that is being executed?
43 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
44 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
45 / 50
Which one of the following register holds the instruction that is being executed?
46 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write
47 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
48 / 50
There are _________ types of reset operations in SRC
49 / 50
Computer system performance is usually measured by the ---------------
50 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
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