CS501-Midterm
1 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
2 / 50
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
3 / 50
Which one of the following register(s) contain(s) the address of the place the CPU wants to work with in the main memory and is/are directly connected to the RAM chips on the motherboard?
4 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
5 / 50
Execution time of a program with respect to the processor is calculated as:
6 / 50
Which instruction is used to store register to memory using relative address?
7 / 50
Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
8 / 50
________ operation is required to change the processor‟s state to a known, defined value.
9 / 50
Almost every commercial computer has its own particular ---------- language
10 / 50
An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
11 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
12 / 50
What does the word „D‟ in the „D-flip-Flop‟ stands for?
13 / 50
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
14 / 50
Motorola MC68000 is an example of ---------microprocessor.
15 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
16 / 50
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
17 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
18 / 50
What functionality is performed by the instruction “str R8, 34” of SRC?
19 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
20 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
21 / 50
For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
22 / 50
The code size of 2-address instruction is ________________.
23 / 50
The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
24 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
25 / 50
Type A of SRC has which of the following instructions?
26 / 50
The external interface of FALCON-A consists of a ________ data bus.
27 / 50
Which one of the following is the memory organization of FALCON-E processor?
28 / 50
The external interface of FALCON-A consists of a ______address bus and ______a data bus.
29 / 50
Which of the instruction is used to load register from memory using a relative address?
30 / 50
Which one of the following registers holds the instruction that is being executed?
31 / 50
Which field of the machine language instruction is the “type of operation” that is to be performed?
32 / 50
There are _________ types of reset operations in SRC
33 / 50
The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
34 / 50
_____________ controller controls the sequence of the flow of microinstructions.
35 / 50
In which one of the following addressing modes, the value to be stored in memory is obtained by directly retrieving it from another memory location?
36 / 50
Which one of the following is the memory organization of EAGLE processor?
37 / 50
which type of instructions help in changing the flow of the program as and when required?
38 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
39 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
40 / 50
What is the working of Processor Status Word (PSW)?
41 / 50
Which one of the following portions of an instruction represents the operation to be performed?
42 / 50
Which one of the following registers holds the address of the next instruction to be executed?
43 / 50
44 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
45 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
46 / 50
What is the size of the memory space that is available to FALCON-A processor?
47 / 50
Which one of the following register holds the instruction that is being executed?
48 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
49 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
50 / 50
-------------- performs the data operations as commanded by the program instructions.
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