CS501-Midterm
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For any of the instructions that are a part of the instruction set of the SRC, there are cerain_________required; which may be used to select the appropriate function for the ALU to be performed, to select the appropriate registers, or the appropriate memory location.
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Motorola MC68000 is an example of ---------microprocessor.
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_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
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What is the working of Processor Status Word (PSW)?
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The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
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How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
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Which one of the following is a bi-stable device, capable of storing one bit of information?
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___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
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FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
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Which one of the following is the memory organization of EAGLE processor?
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Which of the instruction is used to load register from memory using a relative address?
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________ operation is required to change the processor‟s state to a known, defined value.
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For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
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which type of instructions help in changing the flow of the program as and when required?
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What functionality is performed by the instruction “lar R3, 36” of SRC?
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What is the instruction length of the SRC processor?
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What does the word „D‟ in the „D-flip-Flop‟ stands for?
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-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
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The external interface of FALCON-A consists of a ______address bus and ______a data bus.
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Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
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-------------- performs the data operations as commanded by the program instructions.
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Register-register instructions use ____________ memory operands out of a total of 3 operands
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Identify the opcode, destination register (DR), source registers (SA and SB i/e source register A and source register B) from the following example. ADD R1, R2, R3
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Which one of the following registers holds the address of the next instruction to be executed?
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Which field of the machine language instruction is the “type of operation” that is to be performed?
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Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
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To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
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_______ operation is required to change the processor‟s state to a known, defined value.
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“If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
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Type A of SRC has which of the following instructions?
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What is the size of the memory space that is available to FALCON-A processor?
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Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
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_____________all memory systems are dumb, in that they respond to only two commands: read or write
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Which one of the following portions of an instruction represents the operation to be performed?
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There are _________ types of reset operations in SRC
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In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
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An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
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The code size of 2-address instruction is ________________.
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FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
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What is the instruction length of the FALCON-A processor?
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Which one of the following is the memory organization of FALCON-E processor?
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Which one of the following registers holds the instruction that is being executed?
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_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
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Computer system performance is usually measured by the ---------------
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In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
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_____________ controller controls the sequence of the flow of microinstructions.
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Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
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What does the instruction “ldr R3, 58” of SRC do?
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Almost every commercial computer has its own particular ---------- language
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