CS501-Midterm
1 / 50
_______ operation is required to change the processor‟s state to a known, defined value.
2 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write.
3 / 50
Which of the instruction is used to load register from memory using a relative address?
4 / 50
In which one of the following techniques, the time a processor spends waiting for instructions to be fetched from memory is minimized? Select correct option:
5 / 50
The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56]
6 / 50
________ operation is required to change the processor‟s state to a known, defined value.
7 / 50
which type of instructions help in changing the flow of the program as and when required?
8 / 50
Flip-flop is a ____________device, capable of storing one bit of Information
9 / 50
Which one of the following registers holds the address of the next instruction to be executed?
10 / 50
The external interface of FALCON-A consists of a ________ data bus.
11 / 50
Which one of the following register holds the instruction that is being executed?
12 / 50
Almost every commercial computer has its own particular ---------- language
13 / 50
The data movement instructions ___________ data within the machine and to or from input/output devices.
14 / 50
Which one of the following register(s) that is/are programmer invisible and is/are required to hold an operand or result value while the bus is busy transmitting some other value?
15 / 50
_________control signals enable the input to the PC for receiving a value that is currently on the internal processor bus.
16 / 50
An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ----------------
17 / 50
Which one of the following portions of an instruction represents the operation to be performed?
18 / 50
What functionality is performed by the instruction “str R8, 34” of SRC?
19 / 50
There are _________ types of reset operations in SRC
20 / 50
What functionality is performed by the instruction “lar R3, 36” of SRC?
21 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide.
22 / 50
Computer system performance is usually measured by the ---------------
23 / 50
_____________ controller controls the sequence of the flow of microinstructions.
24 / 50
-------------- performs the data operations as commanded by the program instructions.
25 / 50
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
26 / 50
Which one of the following registers stores a previously calculated value or a value loaded from the main memory?
27 / 50
Which of the following can be defined as an address of the operand in a computer type instruction or the target address in a branch type instruction?
28 / 50
-----------is the ability of application software to operate on models of equipment newer than the model for which it was originally developed. Select correct option:
29 / 50
How can we refer to an instruction register (IR), of 16 bits (numbered 0 to 15) using RTL?
30 / 50
_________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus.
31 / 50
Which one of the following registers holds the instruction that is being executed?
32 / 50
What is the size of the memory space that is available to FALCON-A processor?
33 / 50
What does the instruction “ldr R3, 58” of SRC do?
34 / 50
In which of the following instructions the data move between a register in the processor and a memory location (or another register) and are also called data movement?
35 / 50
The CPU includes three types of instructions, which have different operands and will need different representations. Which one of the instructions requires two source registers?
36 / 50
Which operator is used to „name‟ registers, or part of registers, in the Register Transfer Language?
37 / 50
For the __________ type instructions, we require a register to hold the data that is to be loaded from the memory, or stored back to the memory
38 / 50
Register-register instructions use ____________ memory operands out of a total of 3 operands
39 / 50
To access an operand in memory, the CPU must first generate an address, which it then issues to the __________
40 / 50
Which one of the following is the code size and the Number of memory bytes respectively for a 2-address instruction?
41 / 50
_____________all memory systems are dumb, in that they respond to only two commands: read or write
42 / 50
What is the instruction length of the FALCON-A processor?
43 / 50
The code size of 2-address instruction is ________________.
44 / 50
Motorola MC68000 is an example of ---------microprocessor.
45 / 50
Type A of SRC has which of the following instructions?
46 / 50
___________ or Branch instructions affect the order in which instructions are performed, or control the flow of the program
47 / 50
What is the working of Processor Status Word (PSW)?
48 / 50
FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.
49 / 50
Execution time of a program with respect to the processor is calculated as:
50 / 50
Which one of the following is the memory organization of EAGLE processor?
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