CS609 Midterm Online Quiz

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CS609-Midterm

1 / 50

The interval timer can operate in _______ modes.

2 / 50

The interval timer can operate in ____modes.

3 / 50

The ______ service # is not used in any interrupt.

4 / 50

The PPI acts as an interface between the CPU and a parallel ________ .

5 / 50

We have set the bit No. 7 of IMR(Interrupt Mask Register) to unmask the Interrupt so that interrupt _____ can occur at ____ line.

6 / 50

DTE is ____________.

7 / 50

The amount of memory above conventional memory (extended memory) can be determined using the service _______.

8 / 50

Following is not a method of I/O

9 / 50

Int 14H______ can be used to set the line parameter of the UART or COM port

10 / 50

In counter register bit no. 3 changes its value between 0 and 1 with in ____clock cycles

11 / 50

The ____________ function simply enables the self test facility within the modem control register

12 / 50

Usually interrupt procedures are reentrant procedures especially those interrupt procedure compiled using C language compiler are reentrant.

13 / 50

In order to produce the sound from PC internal Speaker we have to load the___bit divisor value at the ___port.

14 / 50

The interval timer can operate in ____modes.

15 / 50

The output on the monitor is controlled by a controller called __________within the PC.

16 / 50

To distinguish 486 with Pentium CPUID Test is used.

17 / 50

DTE is ___________

18 / 50

In case of synchronous communication a timing signal is required to identify the start and end of a bit.

19 / 50

In ____________each byte is needed to be encapsulated in start and end.

20 / 50

PPI is used to perform parallel communication

21 / 50

If we use keep (0, 1000) in a TSR program, the memory allocated to it is

22 / 50

Display device (Monitor) performs _________ I/O.

23 / 50

To set the interrupt vector means is to change the double word sized interrupt vector within the IVT.

24 / 50

______ is LED control byte.

25 / 50

The BIOS interrupt 0x1AH can be used to configure real time clock

26 / 50

PPI stands for

27 / 50

Command register is an _____ bit register

28 / 50

In keyboard status byte bit no. 2 and 3 are used for ctrl and alt keys respectively. which of the following condition is used to check that Ctrl + Alt keys are pressed. Where: unsigned char far * scr = (unsigned char far *)(0x00400017);

29 / 50

By cascading two DMAs ____ bits can be transferred.

30 / 50

UART stands for_______

31 / 50

Int 14H __________ can be used to receive a byte.

32 / 50

The PPI acts as an interface between the CPU and a parallel ________ .

33 / 50

_________ used to determine the amount of conventional memory interfaced with the processor in kilobytes.

34 / 50

At IRQ 7 Interrupt # ___ is used.

35 / 50

By cascading two DMAs ____ bits can be transferred.

36 / 50

In self test mode the output of the UART is routed to its input

37 / 50

The bit number _______ of the coprocessor control word is the interrupt enable flag.

38 / 50

BPB stands for _________.

39 / 50

Operating system name contains ____ bytes in boot block.

40 / 50

NMI Stand for

41 / 50

A software interrupt does not require EOI (End of interrupt).

42 / 50

The keyboard input character scan code is received at ___ port.

43 / 50

Counter register can be used to divide clock signal.

44 / 50

Control information in files is maintained using

45 / 50

File system used in CD’s is_______ file system

46 / 50

The keyboard makes use of interrupt number _______ for its input operations.

47 / 50

____ No. of bytes are used to store the character in the keyboard buffer.

48 / 50

Which port is known as Data Port______

49 / 50

------------ is used to read time from RTC

50 / 50

If we want to produce the grave voice from speaker phone then we have to load the ____ divisor values at Port ____.

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