CS609-Midterm
1 / 50
Timer interrupt is a _________.
2 / 50
In case of synchronous communication a timing signal is required to identify the start and end of a bit.
3 / 50
Bit number _______ of coprocessor control word is the Interrupt Enable Flag.
4 / 50
We have set the bit No. 7 of IMR(Interrupt Mask Register) to unmask the Interrupt so that interrupt _____ can occur at ____ line.
5 / 50
There are two type of communication synchronous and Anti Synchronous
6 / 50
Display device (Monitor) performs _________ I/O.
7 / 50
PPI stands for _____________.
8 / 50
The service _________ is called the keyboard hook service.
9 / 50
There are two main types of interrupts, namely
10 / 50
Interrupt 9 usually reads the _________ from keyboard.
11 / 50
DMA stands for_________
12 / 50
______ is LED control byte.
13 / 50
Register can be used to divide frequency is _________
14 / 50
Software based flow control make use of -------- control characters
15 / 50
DTE is ____________.
16 / 50
In self test mode the output of the UART is routed to its input.
17 / 50
Standard PC operates in two modes in terms of memory which are
18 / 50
The -------- function receive a byte and COM port number is passed as parameter using BIOS service
19 / 50
___________ is used to identify cause of interrupt.
20 / 50
Int 14H __________ can be used to receive a byte.
21 / 50
DCE is _____________
22 / 50
Counter register can be used to divide clock signal.
23 / 50
Interrupt _____ is empty; we can use its vector as a flag.
24 / 50
LPTs can be swapped.
25 / 50
Only ________ ports are important from programming point of view.
26 / 50
The interval timer can operate in ____modes.
27 / 50
Interrupt Vector Table (IVT) in short is a _______ bytes sized table.
28 / 50
If CPUID instruction is not present then the processor can be a
29 / 50
30 / 50
BIOS DO NOT support ______.
31 / 50
File can be______ viewed as collection of clusters or blocks.
32 / 50
The microprocessor package has many signals for data. Below are some in Correct priority order (Higher to Lower).
33 / 50
Hardware Interrupts are __________.
34 / 50
The following command “outportb (0x61,inportb(0x61) | 3);” will ________ .
35 / 50
BPB stands for _________.
36 / 50
In ____________each byte is needed to be encapsulated in start and end.
37 / 50
Command register is an _____ bit register
38 / 50
Tail of keyboard should get to get the start of buffer.
39 / 50
A single interrupt controller can arbitrate among ____ different devices.
40 / 50
Interrupt service number is usually placed in ____________ register.
41 / 50
Int 14H __________ can be used to set the line parameter of the UART or COM port.
42 / 50
Operating system name contains ____ bytes in boot block.
43 / 50
An I/O device cannot be directly connected to the busses so controller is placed between CPU and I/O.
44 / 50
Standard PC can have _____ PPI.
45 / 50
The Function of I/O controller is to provide ____________.
46 / 50
_____ bit is cleared to indicate the low nibble is being sent.
47 / 50
____whenever received indicates the start of communication and ______ whenever received indicates a temporary pause in the communication.
48 / 50
UART stands for_______
49 / 50
Keyboard uses port ____ as status port.
50 / 50
NMI Stand for
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